LCOV - code coverage report
Current view:
top level
-
drivers/net/atlantic/hw_atl
- hw_atl_llh.c
(
source
/ functions)
Hit
Total
Coverage
Test:
Code coverage
Lines:
0
477
0.0 %
Date:
2024-01-22 15:35:40
Functions:
0
163
0.0 %
Legend:
Lines:
hit
not hit
| Branches:
+
taken
-
not taken
#
not executed
Branches:
0
0
-
Function Name
Hit count
hw_atl_glb_glb_reg_res_dis_set
0
hw_atl_glb_soft_res_get
0
hw_atl_glb_soft_res_set
0
hw_atl_itr_irq_auto_masklsw_set
0
hw_atl_itr_irq_map_en_rx_set
0
hw_atl_itr_irq_map_en_tx_set
0
hw_atl_itr_irq_map_rx_set
0
hw_atl_itr_irq_map_tx_set
0
hw_atl_itr_irq_msk_clearlsw_set
0
hw_atl_itr_irq_msk_setlsw_set
0
hw_atl_itr_irq_reg_res_dis_set
0
hw_atl_itr_irq_status_clearlsw_set
0
hw_atl_itr_irq_statuslsw_get
0
hw_atl_itr_res_irq_get
0
hw_atl_itr_res_irq_set
0
hw_atl_mcp_up_force_intr_set
0
hw_atl_msm_reg_access_status_get
0
hw_atl_msm_reg_addr_for_indirect_addr_set
0
hw_atl_msm_reg_rd_data_get
0
hw_atl_msm_reg_rd_strobe_set
0
hw_atl_msm_reg_wr_data_set
0
hw_atl_msm_reg_wr_strobe_set
0
hw_atl_pci_pci_reg_res_dis_set
0
hw_atl_rdm_cpu_id_set
0
hw_atl_rdm_rdm_intr_moder_en_set
0
hw_atl_rdm_rx_dca_en_set
0
hw_atl_rdm_rx_dca_mode_set
0
hw_atl_rdm_rx_desc_data_buff_size_set
0
hw_atl_rdm_rx_desc_dca_en_set
0
hw_atl_rdm_rx_desc_en_set
0
hw_atl_rdm_rx_desc_head_buff_size_set
0
hw_atl_rdm_rx_desc_head_ptr_get
0
hw_atl_rdm_rx_desc_head_splitting_set
0
hw_atl_rdm_rx_desc_len_set
0
hw_atl_rdm_rx_desc_res_set
0
hw_atl_rdm_rx_desc_wr_wb_irq_en_set
0
hw_atl_rdm_rx_head_dca_en_set
0
hw_atl_rdm_rx_pld_dca_en_set
0
hw_atl_reg_gen_irq_map_set
0
hw_atl_reg_gen_irq_status_get
0
hw_atl_reg_glb_cpu_scratch_scp_set
0
hw_atl_reg_glb_cpu_sem_get
0
hw_atl_reg_glb_cpu_sem_set
0
hw_atl_reg_glb_mif_id_get
0
hw_atl_reg_irq_glb_ctl_set
0
hw_atl_reg_irq_thr_set
0
hw_atl_reg_rx_dma_desc_base_addresslswset
0
hw_atl_reg_rx_dma_desc_base_addressmswset
0
hw_atl_reg_rx_dma_desc_status_get
0
hw_atl_reg_rx_dma_desc_tail_ptr_set
0
hw_atl_reg_rx_flr_control2_set
0
hw_atl_reg_rx_flr_mcst_flr_msk_set
0
hw_atl_reg_rx_flr_mcst_flr_set
0
hw_atl_reg_rx_flr_rss_control1set
0
hw_atl_reg_rx_intr_moder_ctrl_set
0
hw_atl_reg_tx_dma_debug_ctl_set
0
hw_atl_reg_tx_dma_desc_base_addresslswset
0
hw_atl_reg_tx_dma_desc_base_addressmswset
0
hw_atl_reg_tx_dma_desc_tail_ptr_set
0
hw_atl_reg_tx_intr_moder_ctrl_set
0
hw_atl_rpb_dma_sys_lbk_set
0
hw_atl_rpb_rpf_rx_traf_class_mode_get
0
hw_atl_rpb_rpf_rx_traf_class_mode_set
0
hw_atl_rpb_rx_buff_en_set
0
hw_atl_rpb_rx_buff_hi_threshold_per_tc_set
0
hw_atl_rpb_rx_buff_lo_threshold_per_tc_set
0
hw_atl_rpb_rx_dma_drop_pkt_cnt_get
0
hw_atl_rpb_rx_flow_ctl_mode_set
0
hw_atl_rpb_rx_pkt_buff_size_per_tc_set
0
hw_atl_rpb_rx_xoff_en_per_tc_set
0
hw_atl_rpb_tps_tx_tc_mode_get
0
hw_atl_rpb_tps_tx_tc_mode_set
0
hw_atl_rpf_etht_flr_act_set
0
hw_atl_rpf_etht_flr_en_set
0
hw_atl_rpf_etht_flr_set
0
hw_atl_rpf_etht_mgt_queue_set
0
hw_atl_rpf_etht_rx_queue_en_set
0
hw_atl_rpf_etht_rx_queue_set
0
hw_atl_rpf_etht_user_priority_en_set
0
hw_atl_rpf_etht_user_priority_set
0
hw_atl_rpf_rpb_user_priority_tc_map_set
0
hw_atl_rpf_rss_key_addr_set
0
hw_atl_rpf_rss_key_wr_data_set
0
hw_atl_rpf_rss_key_wr_en_get
0
hw_atl_rpf_rss_key_wr_en_set
0
hw_atl_rpf_rss_redir_tbl_addr_set
0
hw_atl_rpf_rss_redir_tbl_wr_data_set
0
hw_atl_rpf_rss_redir_wr_en_get
0
hw_atl_rpf_rss_redir_wr_en_set
0
hw_atl_rpf_tpo_to_rpf_sys_lbk_set
0
hw_atl_rpf_vlan_accept_untagged_packets_set
0
hw_atl_rpf_vlan_flr_act_set
0
hw_atl_rpf_vlan_flr_en_set
0
hw_atl_rpf_vlan_id_flr_set
0
hw_atl_rpf_vlan_inner_etht_set
0
hw_atl_rpf_vlan_outer_etht_set
0
hw_atl_rpf_vlan_prom_mode_en_set
0
hw_atl_rpf_vlan_untagged_act_set
0
hw_atl_rpfl2_accept_all_mc_packets_set
0
hw_atl_rpfl2_uc_flr_en_set
0
hw_atl_rpfl2broadcast_count_threshold_set
0
hw_atl_rpfl2broadcast_en_set
0
hw_atl_rpfl2broadcast_flr_act_set
0
hw_atl_rpfl2multicast_flr_en_set
0
hw_atl_rpfl2promiscuous_mode_en_set
0
hw_atl_rpfl2unicast_dest_addresslsw_set
0
hw_atl_rpfl2unicast_dest_addressmsw_set
0
hw_atl_rpfl2unicast_flr_act_set
0
hw_atl_rpo_ipv4header_crc_offload_en_set
0
hw_atl_rpo_lro_en_set
0
hw_atl_rpo_lro_inactive_interval_set
0
hw_atl_rpo_lro_max_coalescing_interval_set
0
hw_atl_rpo_lro_max_num_of_descriptors_set
0
hw_atl_rpo_lro_min_pay_of_first_pkt_set
0
hw_atl_rpo_lro_patch_optimization_en_set
0
hw_atl_rpo_lro_pkt_lim_set
0
hw_atl_rpo_lro_qsessions_lim_set
0
hw_atl_rpo_lro_time_base_divider_set
0
hw_atl_rpo_lro_total_desc_lim_set
0
hw_atl_rpo_rx_desc_vlan_stripping_set
0
hw_atl_rpo_tcp_udp_crc_offload_en_set
0
hw_atl_rx_rx_reg_res_dis_set
0
hw_atl_stats_rx_dma_good_octet_counterlsw_get
0
hw_atl_stats_rx_dma_good_octet_countermsw_get
0
hw_atl_stats_rx_dma_good_pkt_counterlsw_get
0
hw_atl_stats_rx_dma_good_pkt_countermsw_get
0
hw_atl_stats_tx_dma_good_octet_counterlsw_get
0
hw_atl_stats_tx_dma_good_octet_countermsw_get
0
hw_atl_stats_tx_dma_good_pkt_counterlsw_get
0
hw_atl_stats_tx_dma_good_pkt_countermsw_get
0
hw_atl_tdm_cpu_id_set
0
hw_atl_tdm_large_send_offload_en_set
0
hw_atl_tdm_tdm_intr_moder_en_set
0
hw_atl_tdm_tx_dca_en_set
0
hw_atl_tdm_tx_dca_mode_set
0
hw_atl_tdm_tx_desc_dca_en_set
0
hw_atl_tdm_tx_desc_en_set
0
hw_atl_tdm_tx_desc_head_ptr_get
0
hw_atl_tdm_tx_desc_len_set
0
hw_atl_tdm_tx_desc_wr_wb_irq_en_set
0
hw_atl_tdm_tx_desc_wr_wb_threshold_set
0
hw_atl_thm_lso_tcp_flag_of_first_pkt_set
0
hw_atl_thm_lso_tcp_flag_of_last_pkt_set
0
hw_atl_thm_lso_tcp_flag_of_middle_pkt_set
0
hw_atl_tpb_tx_buff_en_set
0
hw_atl_tpb_tx_buff_hi_threshold_per_tc_set
0
hw_atl_tpb_tx_buff_lo_threshold_per_tc_set
0
hw_atl_tpb_tx_dma_sys_lbk_en_set
0
hw_atl_tpb_tx_path_scp_ins_en_set
0
hw_atl_tpb_tx_pkt_buff_size_per_tc_set
0
hw_atl_tpo_ipv4header_crc_offload_en_set
0
hw_atl_tpo_tcp_udp_crc_offload_en_set
0
hw_atl_tpo_tx_pkt_sys_lbk_en_set
0
hw_atl_tps_tx_pkt_shed_data_arb_mode_set
0
hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set
0
hw_atl_tps_tx_pkt_shed_desc_rate_lim_set
0
hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set
0
hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set
0
hw_atl_tps_tx_pkt_shed_desc_tc_weight_set
0
hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set
0
hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set
0
hw_atl_tps_tx_pkt_shed_tc_data_weight_set
0
hw_atl_tx_tx_reg_res_dis_set
0
Generated by:
LCOV version 1.14