Branch data Line data Source code
1 : : /* SPDX-License-Identifier: BSD-3-Clause
2 : : * Copyright 2015 6WIND S.A.
3 : : * Copyright 2020 Mellanox Technologies, Ltd
4 : : */
5 : :
6 : : #include <stddef.h>
7 : : #include <unistd.h>
8 : : #include <string.h>
9 : : #include <stdint.h>
10 : : #include <stdlib.h>
11 : : #include <errno.h>
12 : : #include <net/if.h>
13 : : #include <linux/rtnetlink.h>
14 : : #include <linux/sockios.h>
15 : : #include <linux/ethtool.h>
16 : : #include <fcntl.h>
17 : :
18 : : #include <rte_malloc.h>
19 : : #include <ethdev_driver.h>
20 : : #include <ethdev_pci.h>
21 : : #include <rte_pci.h>
22 : : #include <bus_driver.h>
23 : : #include <bus_pci_driver.h>
24 : : #include <bus_auxiliary_driver.h>
25 : : #include <rte_common.h>
26 : : #include <rte_kvargs.h>
27 : : #include <rte_rwlock.h>
28 : : #include <rte_spinlock.h>
29 : : #include <rte_string_fns.h>
30 : : #include <rte_alarm.h>
31 : : #include <rte_eal_paging.h>
32 : :
33 : : #include <mlx5_glue.h>
34 : : #include <mlx5_devx_cmds.h>
35 : : #include <mlx5_common.h>
36 : : #include <mlx5_common_mp.h>
37 : : #include <mlx5_common_mr.h>
38 : : #include <mlx5_malloc.h>
39 : :
40 : : #include "mlx5_defs.h"
41 : : #include "mlx5.h"
42 : : #include "mlx5_common_os.h"
43 : : #include "mlx5_utils.h"
44 : : #include "mlx5_rxtx.h"
45 : : #include "mlx5_rx.h"
46 : : #include "mlx5_tx.h"
47 : : #include "mlx5_autoconf.h"
48 : : #include "mlx5_flow.h"
49 : : #include "rte_pmd_mlx5.h"
50 : : #include "mlx5_verbs.h"
51 : : #include "mlx5_nl.h"
52 : : #include "mlx5_devx.h"
53 : :
54 : : #ifndef HAVE_IBV_MLX5_MOD_MPW
55 : : #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
56 : : #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
57 : : #endif
58 : :
59 : : #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
60 : : #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
61 : : #endif
62 : :
63 : : static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 : :
65 : : /* Spinlock for mlx5_shared_data allocation. */
66 : : static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 : :
68 : : /* Process local data for secondary processes. */
69 : : static struct mlx5_local_data mlx5_local_data;
70 : :
71 : : /* rte flow indexed pool configuration. */
72 : : static struct mlx5_indexed_pool_config icfg[] = {
73 : : {
74 : : .size = sizeof(struct rte_flow),
75 : : .trunk_size = 64,
76 : : .need_lock = 1,
77 : : .release_mem_en = 0,
78 : : .malloc = mlx5_malloc,
79 : : .free = mlx5_free,
80 : : .per_core_cache = 0,
81 : : .type = "ctl_flow_ipool",
82 : : },
83 : : {
84 : : .size = sizeof(struct rte_flow),
85 : : .trunk_size = 64,
86 : : .grow_trunk = 3,
87 : : .grow_shift = 2,
88 : : .need_lock = 1,
89 : : .release_mem_en = 0,
90 : : .malloc = mlx5_malloc,
91 : : .free = mlx5_free,
92 : : .per_core_cache = 1 << 14,
93 : : .type = "rte_flow_ipool",
94 : : },
95 : : {
96 : : .size = sizeof(struct rte_flow),
97 : : .trunk_size = 64,
98 : : .grow_trunk = 3,
99 : : .grow_shift = 2,
100 : : .need_lock = 1,
101 : : .release_mem_en = 0,
102 : : .malloc = mlx5_malloc,
103 : : .free = mlx5_free,
104 : : .per_core_cache = 0,
105 : : .type = "mcp_flow_ipool",
106 : : },
107 : : };
108 : :
109 : : /**
110 : : * Set the completion channel file descriptor interrupt as non-blocking.
111 : : *
112 : : * @param[in] rxq_obj
113 : : * Pointer to RQ channel object, which includes the channel fd
114 : : *
115 : : * @param[out] fd
116 : : * The file descriptor (representing the interrupt) used in this channel.
117 : : *
118 : : * @return
119 : : * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
120 : : */
121 : : int
122 : 0 : mlx5_os_set_nonblock_channel_fd(int fd)
123 : : {
124 : : int flags;
125 : :
126 : 0 : flags = fcntl(fd, F_GETFL);
127 : 0 : return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
128 : : }
129 : :
130 : : /**
131 : : * Get mlx5 device attributes. The glue function query_device_ex() is called
132 : : * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
133 : : * device attributes from the glue out parameter.
134 : : *
135 : : * @param sh
136 : : * Pointer to shared device context.
137 : : *
138 : : * @return
139 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
140 : : */
141 : : int
142 : 0 : mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
143 : : {
144 : : int err;
145 : 0 : struct mlx5_common_device *cdev = sh->cdev;
146 : 0 : struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
147 : 0 : struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
148 : 0 : struct mlx5dv_context dv_attr = { .comp_mask = 0 };
149 : :
150 : 0 : err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
151 [ # # ]: 0 : if (err) {
152 : 0 : rte_errno = errno;
153 : 0 : return -rte_errno;
154 : : }
155 : : #ifdef HAVE_IBV_MLX5_MOD_SWP
156 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
157 : : #endif
158 : : #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
159 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
160 : : #endif
161 : : #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
162 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
163 : : #endif
164 : 0 : err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
165 [ # # ]: 0 : if (err) {
166 : 0 : rte_errno = errno;
167 : 0 : return -rte_errno;
168 : : }
169 : 0 : memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
170 [ # # ]: 0 : if (mlx5_dev_is_pci(cdev->dev))
171 : 0 : sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
172 : : else
173 : 0 : sh->dev_cap.sf = 1;
174 : 0 : sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
175 : 0 : sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
176 : 0 : sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
177 : 0 : sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
178 : : #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
179 : 0 : sh->dev_cap.dest_tir = 1;
180 : : #endif
181 : : #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
182 : 0 : DRV_LOG(DEBUG, "DV flow is supported.");
183 : 0 : sh->dev_cap.dv_flow_en = 1;
184 : : #endif
185 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
186 [ # # # # ]: 0 : if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
187 : 0 : sh->dev_cap.dv_esw_en = 1;
188 : : #endif
189 : : /*
190 : : * Multi-packet send is supported by ConnectX-4 Lx PF as well
191 : : * as all ConnectX-5 devices.
192 : : */
193 [ # # ]: 0 : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
194 [ # # ]: 0 : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
195 : 0 : DRV_LOG(DEBUG, "Enhanced MPW is supported.");
196 : 0 : sh->dev_cap.mps = MLX5_MPW_ENHANCED;
197 : : } else {
198 : 0 : DRV_LOG(DEBUG, "MPW is supported.");
199 : 0 : sh->dev_cap.mps = MLX5_MPW;
200 : : }
201 : : } else {
202 : 0 : DRV_LOG(DEBUG, "MPW isn't supported.");
203 : 0 : sh->dev_cap.mps = MLX5_MPW_DISABLED;
204 : : }
205 : : #if (RTE_CACHE_LINE_SIZE == 128)
206 : : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
207 : : sh->dev_cap.cqe_comp = 1;
208 : : DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
209 : : sh->dev_cap.cqe_comp ? "" : "not ");
210 : : #else
211 : 0 : sh->dev_cap.cqe_comp = 1;
212 : : #endif
213 : : #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
214 : 0 : sh->dev_cap.mpls_en =
215 : : ((dv_attr.tunnel_offloads_caps &
216 : 0 : MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
217 : : (dv_attr.tunnel_offloads_caps &
218 : : MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
219 [ # # ]: 0 : DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
220 : : sh->dev_cap.mpls_en ? "" : "not ");
221 : : #else
222 : : DRV_LOG(WARNING,
223 : : "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
224 : : #endif
225 : : #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
226 : : sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
227 : : #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
228 : 0 : sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
229 : : IBV_DEVICE_PCI_WRITE_END_PADDING);
230 : : #endif
231 : 0 : sh->dev_cap.hw_csum =
232 : 0 : !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
233 [ # # ]: 0 : DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
234 : : sh->dev_cap.hw_csum ? "" : "not ");
235 : 0 : sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
236 : : IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
237 [ # # ]: 0 : DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
238 : : (sh->dev_cap.hw_vlan_strip ? "" : "not "));
239 : 0 : sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
240 : : IBV_RAW_PACKET_CAP_SCATTER_FCS);
241 : : #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
242 : : !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
243 : : DRV_LOG(DEBUG, "Counters are not supported.");
244 : : #endif
245 : : /*
246 : : * DPDK doesn't support larger/variable indirection tables.
247 : : * Once DPDK supports it, take max size from device attr.
248 : : */
249 : 0 : sh->dev_cap.ind_table_max_size =
250 : 0 : RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
251 : : (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
252 : 0 : DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
253 : : sh->dev_cap.ind_table_max_size);
254 [ # # ]: 0 : sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
255 [ # # ]: 0 : (attr_ex.tso_caps.supported_qpts &
256 : : (1 << IBV_QPT_RAW_PACKET)));
257 [ # # ]: 0 : if (sh->dev_cap.tso)
258 : 0 : sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
259 [ # # ]: 0 : strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
260 : : sizeof(sh->dev_cap.fw_ver));
261 : : #ifdef HAVE_IBV_MLX5_MOD_SWP
262 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
263 : 0 : sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
264 : : (MLX5_SW_PARSING_CAP |
265 : : MLX5_SW_PARSING_CSUM_CAP |
266 : : MLX5_SW_PARSING_TSO_CAP);
267 : 0 : DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
268 : : #endif
269 : : #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
270 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
271 : : struct mlx5dv_striding_rq_caps *strd_rq_caps =
272 : : &dv_attr.striding_rq_caps;
273 : :
274 : 0 : sh->dev_cap.mprq.enabled = 1;
275 : 0 : sh->dev_cap.mprq.log_min_stride_size =
276 : 0 : strd_rq_caps->min_single_stride_log_num_of_bytes;
277 : 0 : sh->dev_cap.mprq.log_max_stride_size =
278 : 0 : strd_rq_caps->max_single_stride_log_num_of_bytes;
279 : 0 : sh->dev_cap.mprq.log_min_stride_num =
280 : 0 : strd_rq_caps->min_single_wqe_log_num_of_strides;
281 : 0 : sh->dev_cap.mprq.log_max_stride_num =
282 : 0 : strd_rq_caps->max_single_wqe_log_num_of_strides;
283 : 0 : sh->dev_cap.mprq.log_min_stride_wqe_size =
284 : 0 : cdev->config.devx ?
285 [ # # ]: 0 : hca_attr->log_min_stride_wqe_sz :
286 : : MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
287 : 0 : DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
288 : : sh->dev_cap.mprq.log_min_stride_size);
289 : 0 : DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
290 : : sh->dev_cap.mprq.log_max_stride_size);
291 : 0 : DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
292 : : sh->dev_cap.mprq.log_min_stride_num);
293 : 0 : DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
294 : : sh->dev_cap.mprq.log_max_stride_num);
295 : 0 : DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
296 : : sh->dev_cap.mprq.log_min_stride_wqe_size);
297 : 0 : DRV_LOG(DEBUG, "\tsupported_qpts: %d",
298 : : strd_rq_caps->supported_qpts);
299 : 0 : DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
300 : : }
301 : : #endif
302 : : #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
303 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
304 : 0 : sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
305 : : (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
306 : : MLX5_TUNNELED_OFFLOADS_GRE_CAP |
307 : : MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
308 : : }
309 [ # # ]: 0 : if (sh->dev_cap.tunnel_en) {
310 [ # # # # : 0 : DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
# # ]
311 : : sh->dev_cap.tunnel_en &
312 : : MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
313 : : sh->dev_cap.tunnel_en &
314 : : MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
315 : : sh->dev_cap.tunnel_en &
316 : : MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
317 : : } else {
318 : 0 : DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
319 : : }
320 : : #else
321 : : DRV_LOG(WARNING,
322 : : "Tunnel offloading disabled due to old OFED/rdma-core version");
323 : : #endif
324 [ # # ]: 0 : if (!sh->cdev->config.devx)
325 : : return 0;
326 : : /* Check capabilities for Packet Pacing. */
327 : 0 : DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
328 : : hca_attr->dev_freq_khz);
329 [ # # ]: 0 : DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
330 : : hca_attr->qos.packet_pacing ? "" : "not ");
331 [ # # ]: 0 : DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
332 : : hca_attr->cross_channel ? "" : "not ");
333 [ # # ]: 0 : DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
334 : : hca_attr->wqe_index_ignore ? "" : "not ");
335 [ # # ]: 0 : DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
336 : : hca_attr->non_wire_sq ? "" : "not ");
337 [ # # ]: 0 : DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
338 : : hca_attr->log_max_static_sq_wq ? "" : "not ",
339 : : hca_attr->log_max_static_sq_wq);
340 [ # # ]: 0 : DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
341 : : hca_attr->qos.wqe_rate_pp ? "" : "not ");
342 : 0 : sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
343 [ # # ]: 0 : if (!hca_attr->cross_channel) {
344 : 0 : DRV_LOG(DEBUG,
345 : : "Cross channel operations are required for packet pacing.");
346 : 0 : sh->dev_cap.txpp_en = 0;
347 : : }
348 [ # # ]: 0 : if (!hca_attr->wqe_index_ignore) {
349 : 0 : DRV_LOG(DEBUG,
350 : : "WQE index ignore feature is required for packet pacing.");
351 : 0 : sh->dev_cap.txpp_en = 0;
352 : : }
353 [ # # ]: 0 : if (!hca_attr->non_wire_sq) {
354 : 0 : DRV_LOG(DEBUG,
355 : : "Non-wire SQ feature is required for packet pacing.");
356 : 0 : sh->dev_cap.txpp_en = 0;
357 : : }
358 [ # # ]: 0 : if (!hca_attr->log_max_static_sq_wq) {
359 : 0 : DRV_LOG(DEBUG,
360 : : "Static WQE SQ feature is required for packet pacing.");
361 : 0 : sh->dev_cap.txpp_en = 0;
362 : : }
363 [ # # ]: 0 : if (!hca_attr->qos.wqe_rate_pp) {
364 : 0 : DRV_LOG(DEBUG,
365 : : "WQE rate mode is required for packet pacing.");
366 : 0 : sh->dev_cap.txpp_en = 0;
367 : : }
368 : : #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
369 : : DRV_LOG(DEBUG,
370 : : "DevX does not provide UAR offset, can't create queues for packet pacing.");
371 : : sh->dev_cap.txpp_en = 0;
372 : : #endif
373 : 0 : sh->dev_cap.scatter_fcs_w_decap_disable =
374 : 0 : hca_attr->scatter_fcs_w_decap_disable;
375 : 0 : sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
376 : 0 : mlx5_rt_timestamp_config(sh, hca_attr);
377 : 0 : return 0;
378 : : }
379 : :
380 : : /**
381 : : * Detect misc5 support or not
382 : : *
383 : : * @param[in] priv
384 : : * Device private data pointer
385 : : */
386 : : #ifdef HAVE_MLX5DV_DR
387 : : static void
388 : 0 : __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
389 : : {
390 : : #ifdef HAVE_IBV_FLOW_DV_SUPPORT
391 : : /* Dummy VxLAN matcher to detect rdma-core misc5 cap
392 : : * Case: IPv4--->UDP--->VxLAN--->vni
393 : : */
394 : : void *tbl;
395 : : struct mlx5_flow_dv_match_params matcher_mask;
396 : : void *match_m;
397 : : void *matcher;
398 : : void *headers_m;
399 : : void *misc5_m;
400 : : uint32_t *tunnel_header_m;
401 : : struct mlx5dv_flow_matcher_attr dv_attr;
402 : :
403 : : memset(&matcher_mask, 0, sizeof(matcher_mask));
404 : 0 : matcher_mask.size = sizeof(matcher_mask.buf);
405 : : match_m = matcher_mask.buf;
406 : : headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
407 : : misc5_m = MLX5_ADDR_OF(fte_match_param,
408 : : match_m, misc_parameters_5);
409 : : tunnel_header_m = (uint32_t *)
410 : : MLX5_ADDR_OF(fte_match_set_misc5,
411 : : misc5_m, tunnel_header_1);
412 : : MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
413 [ # # ]: 0 : MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
414 : 0 : MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
415 : 0 : *tunnel_header_m = 0xffffff;
416 : :
417 : 0 : tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
418 [ # # ]: 0 : if (!tbl) {
419 : 0 : DRV_LOG(INFO, "No SW steering support");
420 : 0 : return;
421 : : }
422 : 0 : dv_attr.type = IBV_FLOW_ATTR_NORMAL,
423 : 0 : dv_attr.match_mask = (void *)&matcher_mask,
424 : 0 : dv_attr.match_criteria_enable =
425 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
426 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
427 : 0 : dv_attr.priority = 3;
428 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
429 : : void *misc2_m;
430 [ # # ]: 0 : if (priv->sh->config.dv_esw_en) {
431 : : /* FDB enabled reg_c_0 */
432 : 0 : dv_attr.match_criteria_enable |=
433 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
434 : : misc2_m = MLX5_ADDR_OF(fte_match_param,
435 : : match_m, misc_parameters_2);
436 [ # # ]: 0 : MLX5_SET(fte_match_set_misc2, misc2_m,
437 : : metadata_reg_c_0, 0xffff);
438 : : }
439 : : #endif
440 : 0 : matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
441 : : &dv_attr, tbl);
442 [ # # ]: 0 : if (matcher) {
443 : 0 : priv->sh->misc5_cap = 1;
444 : 0 : mlx5_glue->dv_destroy_flow_matcher(matcher);
445 : : }
446 : 0 : mlx5_glue->dr_destroy_flow_tbl(tbl);
447 : : #else
448 : : RTE_SET_USED(priv);
449 : : #endif
450 : : }
451 : : #endif
452 : :
453 : : /**
454 : : * Initialize DR related data within private structure.
455 : : * Routine checks the reference counter and does actual
456 : : * resources creation/initialization only if counter is zero.
457 : : *
458 : : * @param[in] priv
459 : : * Pointer to the private device data structure.
460 : : *
461 : : * @return
462 : : * Zero on success, positive error code otherwise.
463 : : */
464 : : static int
465 : 0 : mlx5_alloc_shared_dr(struct mlx5_priv *priv)
466 : : {
467 : 0 : struct mlx5_dev_ctx_shared *sh = priv->sh;
468 : : char s[MLX5_NAME_SIZE] __rte_unused;
469 : : int err;
470 : :
471 : : MLX5_ASSERT(sh && sh->refcnt);
472 [ # # ]: 0 : if (sh->refcnt > 1)
473 : : return 0;
474 : 0 : err = mlx5_alloc_table_hash_list(priv);
475 [ # # ]: 0 : if (err)
476 : 0 : goto error;
477 : 0 : sh->default_miss_action =
478 : 0 : mlx5_glue->dr_create_flow_action_default_miss();
479 [ # # ]: 0 : if (!sh->default_miss_action)
480 : 0 : DRV_LOG(WARNING, "Default miss action is not supported.");
481 : : /* The resources below are only valid with DV support. */
482 : : #ifdef HAVE_IBV_FLOW_DV_SUPPORT
483 : : /* Init shared flex parsers list, no need lcore_share */
484 : 0 : snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
485 : 0 : sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
486 : : mlx5_flex_parser_create_cb,
487 : : mlx5_flex_parser_match_cb,
488 : : mlx5_flex_parser_remove_cb,
489 : : mlx5_flex_parser_clone_cb,
490 : : mlx5_flex_parser_clone_free_cb);
491 [ # # ]: 0 : if (!sh->flex_parsers_dv)
492 : 0 : goto error;
493 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2)
494 : : return 0;
495 : : /* Init port id action list. */
496 : : snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
497 : 0 : sh->port_id_action_list = mlx5_list_create(s, sh, true,
498 : : flow_dv_port_id_create_cb,
499 : : flow_dv_port_id_match_cb,
500 : : flow_dv_port_id_remove_cb,
501 : : flow_dv_port_id_clone_cb,
502 : : flow_dv_port_id_clone_free_cb);
503 [ # # ]: 0 : if (!sh->port_id_action_list)
504 : 0 : goto error;
505 : : /* Init push vlan action list. */
506 : : snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
507 : 0 : sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
508 : : flow_dv_push_vlan_create_cb,
509 : : flow_dv_push_vlan_match_cb,
510 : : flow_dv_push_vlan_remove_cb,
511 : : flow_dv_push_vlan_clone_cb,
512 : : flow_dv_push_vlan_clone_free_cb);
513 [ # # ]: 0 : if (!sh->push_vlan_action_list)
514 : 0 : goto error;
515 : : /* Init sample action list. */
516 : : snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
517 : 0 : sh->sample_action_list = mlx5_list_create(s, sh, true,
518 : : flow_dv_sample_create_cb,
519 : : flow_dv_sample_match_cb,
520 : : flow_dv_sample_remove_cb,
521 : : flow_dv_sample_clone_cb,
522 : : flow_dv_sample_clone_free_cb);
523 [ # # ]: 0 : if (!sh->sample_action_list)
524 : 0 : goto error;
525 : : /* Init dest array action list. */
526 : : snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
527 : 0 : sh->dest_array_list = mlx5_list_create(s, sh, true,
528 : : flow_dv_dest_array_create_cb,
529 : : flow_dv_dest_array_match_cb,
530 : : flow_dv_dest_array_remove_cb,
531 : : flow_dv_dest_array_clone_cb,
532 : : flow_dv_dest_array_clone_free_cb);
533 [ # # ]: 0 : if (!sh->dest_array_list)
534 : 0 : goto error;
535 : : #else
536 : : if (priv->sh->config.dv_flow_en == 2)
537 : : return 0;
538 : : #endif
539 : : #ifdef HAVE_MLX5DV_DR
540 : : void *domain;
541 : :
542 : : /* Reference counter is zero, we should initialize structures. */
543 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
544 : : MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
545 [ # # ]: 0 : if (!domain) {
546 : 0 : DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
547 : 0 : err = errno;
548 : 0 : goto error;
549 : : }
550 : 0 : sh->rx_domain = domain;
551 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
552 : : MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
553 [ # # ]: 0 : if (!domain) {
554 : 0 : DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
555 : 0 : err = errno;
556 : 0 : goto error;
557 : : }
558 : 0 : sh->tx_domain = domain;
559 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
560 [ # # ]: 0 : if (sh->config.dv_esw_en) {
561 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
562 : : MLX5DV_DR_DOMAIN_TYPE_FDB);
563 [ # # ]: 0 : if (!domain) {
564 : 0 : DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
565 : 0 : err = errno;
566 : 0 : goto error;
567 : : }
568 : 0 : sh->fdb_domain = domain;
569 : : }
570 : : /*
571 : : * The drop action is just some dummy placeholder in rdma-core. It
572 : : * does not belong to domains and has no any attributes, and, can be
573 : : * shared by the entire device.
574 : : */
575 : 0 : sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
576 [ # # ]: 0 : if (!sh->dr_drop_action) {
577 : 0 : DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
578 : 0 : err = errno;
579 : 0 : goto error;
580 : : }
581 : : #endif
582 [ # # # # ]: 0 : if (!sh->tunnel_hub && sh->config.dv_miss_info)
583 : 0 : err = mlx5_alloc_tunnel_hub(sh);
584 [ # # ]: 0 : if (err) {
585 : 0 : DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
586 : 0 : goto error;
587 : : }
588 [ # # ]: 0 : if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
589 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
590 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
591 [ # # ]: 0 : if (sh->fdb_domain)
592 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
593 : : }
594 : 0 : sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
595 [ # # ]: 0 : if (!sh->config.allow_duplicate_pattern) {
596 : : #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
597 : : DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
598 : : #endif
599 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
600 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
601 [ # # ]: 0 : if (sh->fdb_domain)
602 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
603 : : }
604 : :
605 : 0 : __mlx5_discovery_misc5_cap(priv);
606 : : #endif /* HAVE_MLX5DV_DR */
607 : 0 : LIST_INIT(&sh->shared_rxqs);
608 : 0 : return 0;
609 : 0 : error:
610 : : /* Rollback the created objects. */
611 [ # # ]: 0 : if (sh->rx_domain) {
612 : 0 : mlx5_glue->dr_destroy_domain(sh->rx_domain);
613 : 0 : sh->rx_domain = NULL;
614 : : }
615 [ # # ]: 0 : if (sh->tx_domain) {
616 : 0 : mlx5_glue->dr_destroy_domain(sh->tx_domain);
617 : 0 : sh->tx_domain = NULL;
618 : : }
619 [ # # ]: 0 : if (sh->fdb_domain) {
620 : 0 : mlx5_glue->dr_destroy_domain(sh->fdb_domain);
621 : 0 : sh->fdb_domain = NULL;
622 : : }
623 [ # # ]: 0 : if (sh->dr_drop_action) {
624 : 0 : mlx5_glue->destroy_flow_action(sh->dr_drop_action);
625 : 0 : sh->dr_drop_action = NULL;
626 : : }
627 [ # # ]: 0 : if (sh->pop_vlan_action) {
628 : 0 : mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
629 : 0 : sh->pop_vlan_action = NULL;
630 : : }
631 [ # # ]: 0 : if (sh->encaps_decaps) {
632 : 0 : mlx5_hlist_destroy(sh->encaps_decaps);
633 : 0 : sh->encaps_decaps = NULL;
634 : : }
635 [ # # ]: 0 : if (sh->modify_cmds) {
636 : 0 : mlx5_hlist_destroy(sh->modify_cmds);
637 : 0 : sh->modify_cmds = NULL;
638 : : }
639 [ # # ]: 0 : if (sh->tag_table) {
640 : : /* tags should be destroyed with flow before. */
641 : 0 : mlx5_hlist_destroy(sh->tag_table);
642 : 0 : sh->tag_table = NULL;
643 : : }
644 [ # # ]: 0 : if (sh->tunnel_hub) {
645 : 0 : mlx5_release_tunnel_hub(sh, priv->dev_port);
646 : 0 : sh->tunnel_hub = NULL;
647 : : }
648 : 0 : mlx5_free_table_hash_list(priv);
649 [ # # ]: 0 : if (sh->port_id_action_list) {
650 : 0 : mlx5_list_destroy(sh->port_id_action_list);
651 : 0 : sh->port_id_action_list = NULL;
652 : : }
653 [ # # ]: 0 : if (sh->push_vlan_action_list) {
654 : 0 : mlx5_list_destroy(sh->push_vlan_action_list);
655 : 0 : sh->push_vlan_action_list = NULL;
656 : : }
657 [ # # ]: 0 : if (sh->sample_action_list) {
658 : 0 : mlx5_list_destroy(sh->sample_action_list);
659 : 0 : sh->sample_action_list = NULL;
660 : : }
661 [ # # ]: 0 : if (sh->dest_array_list) {
662 : 0 : mlx5_list_destroy(sh->dest_array_list);
663 : 0 : sh->dest_array_list = NULL;
664 : : }
665 : : return err;
666 : : }
667 : :
668 : : /**
669 : : * Destroy DR related data within private structure.
670 : : *
671 : : * @param[in] priv
672 : : * Pointer to the private device data structure.
673 : : */
674 : : void
675 : 0 : mlx5_os_free_shared_dr(struct mlx5_priv *priv)
676 : : {
677 : 0 : struct mlx5_dev_ctx_shared *sh = priv->sh;
678 : : #ifdef HAVE_MLX5DV_DR
679 : : int i;
680 : : #endif
681 : :
682 : : MLX5_ASSERT(sh && sh->refcnt);
683 [ # # ]: 0 : if (sh->refcnt > 1)
684 : : return;
685 : : MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
686 : : #ifdef HAVE_MLX5DV_DR
687 [ # # ]: 0 : if (sh->rx_domain) {
688 : 0 : mlx5_glue->dr_destroy_domain(sh->rx_domain);
689 : 0 : sh->rx_domain = NULL;
690 : : }
691 [ # # ]: 0 : if (sh->tx_domain) {
692 : 0 : mlx5_glue->dr_destroy_domain(sh->tx_domain);
693 : 0 : sh->tx_domain = NULL;
694 : : }
695 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
696 [ # # ]: 0 : if (sh->fdb_domain) {
697 : 0 : mlx5_glue->dr_destroy_domain(sh->fdb_domain);
698 : 0 : sh->fdb_domain = NULL;
699 : : }
700 [ # # ]: 0 : if (sh->dr_drop_action) {
701 : 0 : mlx5_glue->destroy_flow_action(sh->dr_drop_action);
702 : 0 : sh->dr_drop_action = NULL;
703 : : }
704 : : #endif
705 [ # # ]: 0 : if (sh->pop_vlan_action) {
706 : 0 : mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
707 : 0 : sh->pop_vlan_action = NULL;
708 : : }
709 [ # # ]: 0 : for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) {
710 [ # # ]: 0 : if (sh->send_to_kernel_action[i].action) {
711 : : void *action = sh->send_to_kernel_action[i].action;
712 : :
713 : 0 : mlx5_glue->destroy_flow_action(action);
714 : 0 : sh->send_to_kernel_action[i].action = NULL;
715 : : }
716 [ # # ]: 0 : if (sh->send_to_kernel_action[i].tbl) {
717 : : struct mlx5_flow_tbl_resource *tbl =
718 : : sh->send_to_kernel_action[i].tbl;
719 : :
720 : 0 : flow_dv_tbl_resource_release(sh, tbl);
721 : 0 : sh->send_to_kernel_action[i].tbl = NULL;
722 : : }
723 : : }
724 : : #endif /* HAVE_MLX5DV_DR */
725 [ # # ]: 0 : if (sh->default_miss_action)
726 : 0 : mlx5_glue->destroy_flow_action
727 : : (sh->default_miss_action);
728 [ # # ]: 0 : if (sh->encaps_decaps) {
729 : 0 : mlx5_hlist_destroy(sh->encaps_decaps);
730 : 0 : sh->encaps_decaps = NULL;
731 : : }
732 [ # # ]: 0 : if (sh->modify_cmds) {
733 : 0 : mlx5_hlist_destroy(sh->modify_cmds);
734 : 0 : sh->modify_cmds = NULL;
735 : : }
736 [ # # ]: 0 : if (sh->tag_table) {
737 : : /* tags should be destroyed with flow before. */
738 : 0 : mlx5_hlist_destroy(sh->tag_table);
739 : 0 : sh->tag_table = NULL;
740 : : }
741 [ # # ]: 0 : if (sh->tunnel_hub) {
742 : 0 : mlx5_release_tunnel_hub(sh, priv->dev_port);
743 : 0 : sh->tunnel_hub = NULL;
744 : : }
745 : 0 : mlx5_free_table_hash_list(priv);
746 [ # # ]: 0 : if (sh->port_id_action_list) {
747 : 0 : mlx5_list_destroy(sh->port_id_action_list);
748 : 0 : sh->port_id_action_list = NULL;
749 : : }
750 [ # # ]: 0 : if (sh->push_vlan_action_list) {
751 : 0 : mlx5_list_destroy(sh->push_vlan_action_list);
752 : 0 : sh->push_vlan_action_list = NULL;
753 : : }
754 [ # # ]: 0 : if (sh->sample_action_list) {
755 : 0 : mlx5_list_destroy(sh->sample_action_list);
756 : 0 : sh->sample_action_list = NULL;
757 : : }
758 [ # # ]: 0 : if (sh->dest_array_list) {
759 : 0 : mlx5_list_destroy(sh->dest_array_list);
760 : 0 : sh->dest_array_list = NULL;
761 : : }
762 : : }
763 : :
764 : : /**
765 : : * Initialize shared data between primary and secondary process.
766 : : *
767 : : * A memzone is reserved by primary process and secondary processes attach to
768 : : * the memzone.
769 : : *
770 : : * @return
771 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
772 : : */
773 : : static int
774 : 0 : mlx5_init_shared_data(void)
775 : : {
776 : : const struct rte_memzone *mz;
777 : : int ret = 0;
778 : :
779 : : rte_spinlock_lock(&mlx5_shared_data_lock);
780 [ # # ]: 0 : if (mlx5_shared_data == NULL) {
781 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
782 : : /* Allocate shared memory. */
783 : 0 : mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
784 : : sizeof(*mlx5_shared_data),
785 : : SOCKET_ID_ANY, 0);
786 [ # # ]: 0 : if (mz == NULL) {
787 : 0 : DRV_LOG(ERR,
788 : : "Cannot allocate mlx5 shared data");
789 : 0 : ret = -rte_errno;
790 : 0 : goto error;
791 : : }
792 : 0 : mlx5_shared_data = mz->addr;
793 : : memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
794 : 0 : rte_spinlock_init(&mlx5_shared_data->lock);
795 : : } else {
796 : : /* Lookup allocated shared memory. */
797 : 0 : mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
798 [ # # ]: 0 : if (mz == NULL) {
799 : 0 : DRV_LOG(ERR,
800 : : "Cannot attach mlx5 shared data");
801 : 0 : ret = -rte_errno;
802 : 0 : goto error;
803 : : }
804 : 0 : mlx5_shared_data = mz->addr;
805 : : memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
806 : : }
807 : : }
808 : 0 : error:
809 : : rte_spinlock_unlock(&mlx5_shared_data_lock);
810 : 0 : return ret;
811 : : }
812 : :
813 : : /**
814 : : * PMD global initialization.
815 : : *
816 : : * Independent from individual device, this function initializes global
817 : : * per-PMD data structures distinguishing primary and secondary processes.
818 : : * Hence, each initialization is called once per a process.
819 : : *
820 : : * @return
821 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
822 : : */
823 : : static int
824 : 0 : mlx5_init_once(void)
825 : : {
826 : : struct mlx5_shared_data *sd;
827 : : struct mlx5_local_data *ld = &mlx5_local_data;
828 : : int ret = 0;
829 : :
830 [ # # ]: 0 : if (mlx5_init_shared_data())
831 : 0 : return -rte_errno;
832 : 0 : sd = mlx5_shared_data;
833 : : MLX5_ASSERT(sd);
834 : 0 : rte_spinlock_lock(&sd->lock);
835 [ # # # ]: 0 : switch (rte_eal_process_type()) {
836 : 0 : case RTE_PROC_PRIMARY:
837 [ # # ]: 0 : if (sd->init_done)
838 : : break;
839 : 0 : ret = mlx5_mp_init_primary(MLX5_MP_NAME,
840 : : mlx5_mp_os_primary_handle);
841 [ # # ]: 0 : if (ret)
842 : 0 : goto out;
843 : 0 : sd->init_done = true;
844 : 0 : break;
845 : 0 : case RTE_PROC_SECONDARY:
846 [ # # ]: 0 : if (ld->init_done)
847 : : break;
848 : 0 : ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
849 : : mlx5_mp_os_secondary_handle);
850 [ # # ]: 0 : if (ret)
851 : 0 : goto out;
852 : 0 : ++sd->secondary_cnt;
853 : 0 : ld->init_done = true;
854 : 0 : break;
855 : : default:
856 : : break;
857 : : }
858 : 0 : out:
859 : : rte_spinlock_unlock(&sd->lock);
860 : 0 : return ret;
861 : : }
862 : :
863 : : /**
864 : : * DR flow drop action support detect.
865 : : *
866 : : * @param dev
867 : : * Pointer to rte_eth_dev structure.
868 : : *
869 : : */
870 : : static void
871 : 0 : mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
872 : : {
873 : : #ifdef HAVE_MLX5DV_DR
874 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
875 : :
876 [ # # # # ]: 0 : if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
877 : : return;
878 : : /**
879 : : * DR supports drop action placeholder when it is supported;
880 : : * otherwise, use the queue drop action.
881 : : */
882 [ # # ]: 0 : if (!priv->sh->drop_action_check_flag) {
883 [ # # ]: 0 : if (!mlx5_flow_discover_dr_action_support(dev))
884 : 0 : priv->sh->dr_root_drop_action_en = 1;
885 : 0 : priv->sh->drop_action_check_flag = 1;
886 : : }
887 [ # # ]: 0 : if (priv->sh->dr_root_drop_action_en)
888 : 0 : priv->root_drop_action = priv->sh->dr_drop_action;
889 : : else
890 : 0 : priv->root_drop_action = priv->drop_queue.hrxq->action;
891 : : #endif
892 : : }
893 : :
894 : : static void
895 : 0 : mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
896 : : {
897 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
898 : 0 : void *ctx = priv->sh->cdev->ctx;
899 : :
900 : 0 : priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
901 [ # # ]: 0 : if (!priv->q_counters) {
902 : 0 : struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
903 : : struct ibv_wq *wq;
904 : :
905 : 0 : DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
906 : : "by DevX - fall-back to use the kernel driver global "
907 : : "queue counter.", dev->data->port_id);
908 : : /* Create WQ by kernel and query its queue counter ID. */
909 [ # # ]: 0 : if (cq) {
910 : 0 : wq = mlx5_glue->create_wq(ctx,
911 : 0 : &(struct ibv_wq_init_attr){
912 : : .wq_type = IBV_WQT_RQ,
913 : : .max_wr = 1,
914 : : .max_sge = 1,
915 : 0 : .pd = priv->sh->cdev->pd,
916 : : .cq = cq,
917 : : });
918 [ # # ]: 0 : if (wq) {
919 : : /* Counter is assigned only on RDY state. */
920 : 0 : int ret = mlx5_glue->modify_wq(wq,
921 : 0 : &(struct ibv_wq_attr){
922 : : .attr_mask = IBV_WQ_ATTR_STATE,
923 : : .wq_state = IBV_WQS_RDY,
924 : : });
925 : :
926 [ # # ]: 0 : if (ret == 0)
927 : 0 : mlx5_devx_cmd_wq_query(wq,
928 : : &priv->counter_set_id);
929 : 0 : claim_zero(mlx5_glue->destroy_wq(wq));
930 : : }
931 : 0 : claim_zero(mlx5_glue->destroy_cq(cq));
932 : : }
933 : : } else {
934 : 0 : priv->counter_set_id = priv->q_counters->id;
935 : : }
936 [ # # ]: 0 : if (priv->counter_set_id == 0)
937 : 0 : DRV_LOG(INFO, "Part of the port %d statistics will not be "
938 : : "available.", dev->data->port_id);
939 : 0 : }
940 : :
941 : : /**
942 : : * Check if representor spawn info match devargs.
943 : : *
944 : : * @param spawn
945 : : * Verbs device parameters (name, port, switch_info) to spawn.
946 : : * @param eth_da
947 : : * Device devargs to probe.
948 : : *
949 : : * @return
950 : : * Match result.
951 : : */
952 : : static bool
953 : 0 : mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
954 : : struct rte_eth_devargs *eth_da)
955 : : {
956 : 0 : struct mlx5_switch_info *switch_info = &spawn->info;
957 : : unsigned int p, f;
958 : : uint16_t id;
959 : 0 : uint16_t repr_id = mlx5_representor_id_encode(switch_info,
960 : : eth_da->type);
961 : :
962 : : /*
963 : : * Assuming Multiport E-Switch device was detected,
964 : : * if spawned port is an uplink, check if the port
965 : : * was requested through representor devarg.
966 : : */
967 [ # # ]: 0 : if (mlx5_is_probed_port_on_mpesw_device(spawn) &&
968 [ # # ]: 0 : switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
969 [ # # ]: 0 : for (p = 0; p < eth_da->nb_ports; ++p)
970 [ # # ]: 0 : if (switch_info->port_name == eth_da->ports[p])
971 : : return true;
972 : 0 : rte_errno = EBUSY;
973 : 0 : return false;
974 : : }
975 [ # # # # : 0 : switch (eth_da->type) {
# ]
976 : : case RTE_ETH_REPRESENTOR_PF:
977 : : /*
978 : : * PF representors provided in devargs translate to uplink ports, but
979 : : * if and only if the device is a part of MPESW device.
980 : : */
981 [ # # ]: 0 : if (!mlx5_is_probed_port_on_mpesw_device(spawn)) {
982 : 0 : rte_errno = EBUSY;
983 : 0 : return false;
984 : : }
985 : : break;
986 : 0 : case RTE_ETH_REPRESENTOR_SF:
987 [ # # ]: 0 : if (!(spawn->info.port_name == -1 &&
988 [ # # ]: 0 : switch_info->name_type ==
989 : 0 : MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
990 [ # # ]: 0 : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
991 : 0 : rte_errno = EBUSY;
992 : 0 : return false;
993 : : }
994 : : break;
995 : 0 : case RTE_ETH_REPRESENTOR_VF:
996 : : /* Allows HPF representor index -1 as exception. */
997 [ # # ]: 0 : if (!(spawn->info.port_name == -1 &&
998 [ # # ]: 0 : switch_info->name_type ==
999 : 0 : MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
1000 [ # # ]: 0 : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
1001 : 0 : rte_errno = EBUSY;
1002 : 0 : return false;
1003 : : }
1004 : : break;
1005 : 0 : case RTE_ETH_REPRESENTOR_NONE:
1006 : 0 : rte_errno = EBUSY;
1007 : 0 : return false;
1008 : 0 : default:
1009 : 0 : rte_errno = ENOTSUP;
1010 : 0 : DRV_LOG(ERR, "unsupported representor type");
1011 : 0 : return false;
1012 : : }
1013 : : /* Check representor ID: */
1014 [ # # ]: 0 : for (p = 0; p < eth_da->nb_ports; ++p) {
1015 [ # # # # ]: 0 : if (!mlx5_is_probed_port_on_mpesw_device(spawn) && spawn->pf_bond < 0) {
1016 : : /* For non-LAG mode, allow and ignore pf. */
1017 : 0 : switch_info->pf_num = eth_da->ports[p];
1018 : 0 : repr_id = mlx5_representor_id_encode(switch_info,
1019 : : eth_da->type);
1020 : : }
1021 [ # # ]: 0 : for (f = 0; f < eth_da->nb_representor_ports; ++f) {
1022 : 0 : id = MLX5_REPRESENTOR_ID
1023 : : (eth_da->ports[p], eth_da->type,
1024 : : eth_da->representor_ports[f]);
1025 [ # # ]: 0 : if (repr_id == id)
1026 : : return true;
1027 : : }
1028 : : }
1029 : 0 : rte_errno = EBUSY;
1030 : 0 : return false;
1031 : : }
1032 : :
1033 : : /**
1034 : : * Spawn an Ethernet device from Verbs information.
1035 : : *
1036 : : * @param dpdk_dev
1037 : : * Backing DPDK device.
1038 : : * @param spawn
1039 : : * Verbs device parameters (name, port, switch_info) to spawn.
1040 : : * @param eth_da
1041 : : * Device arguments.
1042 : : * @param mkvlist
1043 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
1044 : : *
1045 : : * @return
1046 : : * A valid Ethernet device object on success, NULL otherwise and rte_errno
1047 : : * is set. The following errors are defined:
1048 : : *
1049 : : * EBUSY: device is not supposed to be spawned.
1050 : : * EEXIST: device is already spawned
1051 : : */
1052 : : static struct rte_eth_dev *
1053 : 0 : mlx5_dev_spawn(struct rte_device *dpdk_dev,
1054 : : struct mlx5_dev_spawn_data *spawn,
1055 : : struct rte_eth_devargs *eth_da,
1056 : : struct mlx5_kvargs_ctrl *mkvlist)
1057 : : {
1058 : 0 : const struct mlx5_switch_info *switch_info = &spawn->info;
1059 : : struct mlx5_dev_ctx_shared *sh = NULL;
1060 : 0 : struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
1061 : : struct rte_eth_dev *eth_dev = NULL;
1062 : : struct mlx5_priv *priv = NULL;
1063 : : int err = 0;
1064 : : struct rte_ether_addr mac;
1065 : : char name[RTE_ETH_NAME_MAX_LEN];
1066 : : int own_domain_id = 0;
1067 : : uint16_t port_id;
1068 : 0 : struct mlx5_port_info vport_info = { .query_flags = 0 };
1069 : : int nl_rdma;
1070 : : int i;
1071 : :
1072 : : /* Determine if this port representor is supposed to be spawned. */
1073 [ # # # # : 0 : if (switch_info->representor && dpdk_dev->devargs &&
# # ]
1074 : 0 : !mlx5_representor_match(spawn, eth_da))
1075 : : return NULL;
1076 : : /* Build device name. */
1077 [ # # ]: 0 : if (spawn->pf_bond >= 0) {
1078 : : /* Bonding device. */
1079 [ # # ]: 0 : if (!switch_info->representor) {
1080 : 0 : err = snprintf(name, sizeof(name), "%s_%s",
1081 : : dpdk_dev->name, spawn->phys_dev_name);
1082 : : } else {
1083 : 0 : err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1084 : : dpdk_dev->name, spawn->phys_dev_name,
1085 : 0 : switch_info->ctrl_num,
1086 : 0 : switch_info->pf_num,
1087 : 0 : switch_info->name_type ==
1088 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1089 [ # # ]: 0 : switch_info->port_name);
1090 : : }
1091 [ # # ]: 0 : } else if (mlx5_is_probed_port_on_mpesw_device(spawn)) {
1092 : : /* MPESW device. */
1093 [ # # ]: 0 : if (switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1094 : 0 : err = snprintf(name, sizeof(name), "%s_p%d",
1095 : : dpdk_dev->name, spawn->mpesw_port);
1096 : : } else {
1097 : 0 : err = snprintf(name, sizeof(name), "%s_representor_c%dpf%d%s%u",
1098 : : dpdk_dev->name,
1099 : 0 : switch_info->ctrl_num,
1100 : 0 : switch_info->pf_num,
1101 : : switch_info->name_type ==
1102 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1103 [ # # ]: 0 : switch_info->port_name);
1104 : : }
1105 : : } else {
1106 : : /* Single device. */
1107 [ # # ]: 0 : if (!switch_info->representor)
1108 : 0 : strlcpy(name, dpdk_dev->name, sizeof(name));
1109 : : else
1110 : 0 : err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1111 : : dpdk_dev->name,
1112 : 0 : switch_info->name_type ==
1113 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1114 [ # # ]: 0 : switch_info->port_name);
1115 : : }
1116 [ # # ]: 0 : if (err >= (int)sizeof(name))
1117 : 0 : DRV_LOG(WARNING, "device name overflow %s", name);
1118 : : /* check if the device is already spawned */
1119 [ # # ]: 0 : if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1120 : : /*
1121 : : * When device is already spawned, its devargs should be set
1122 : : * as used. otherwise, mlx5_kvargs_validate() will fail.
1123 : : */
1124 [ # # ]: 0 : if (mkvlist)
1125 : 0 : mlx5_port_args_set_used(name, port_id, mkvlist);
1126 : 0 : rte_errno = EEXIST;
1127 : 0 : return NULL;
1128 : : }
1129 : 0 : DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1130 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1131 : : struct mlx5_mp_id mp_id;
1132 : : int fd;
1133 : :
1134 : 0 : eth_dev = rte_eth_dev_attach_secondary(name);
1135 [ # # ]: 0 : if (eth_dev == NULL) {
1136 : 0 : DRV_LOG(ERR, "can not attach rte ethdev");
1137 : 0 : rte_errno = ENOMEM;
1138 : 0 : return NULL;
1139 : : }
1140 : 0 : eth_dev->device = dpdk_dev;
1141 : 0 : eth_dev->dev_ops = &mlx5_dev_sec_ops;
1142 : 0 : eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1143 : 0 : eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1144 : 0 : err = mlx5_proc_priv_init(eth_dev);
1145 [ # # ]: 0 : if (err)
1146 : : return NULL;
1147 : 0 : mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1148 : : /* Receive command fd from primary process */
1149 : 0 : fd = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1150 [ # # ]: 0 : if (fd < 0)
1151 : 0 : goto err_secondary;
1152 : : /* Remap UAR for Tx queues. */
1153 : 0 : err = mlx5_tx_uar_init_secondary(eth_dev, fd);
1154 : 0 : close(fd);
1155 [ # # ]: 0 : if (err)
1156 : 0 : goto err_secondary;
1157 : : /*
1158 : : * Ethdev pointer is still required as input since
1159 : : * the primary device is not accessible from the
1160 : : * secondary process.
1161 : : */
1162 : 0 : eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1163 : 0 : eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1164 : 0 : return eth_dev;
1165 : 0 : err_secondary:
1166 : 0 : mlx5_dev_close(eth_dev);
1167 : 0 : return NULL;
1168 : : }
1169 : 0 : sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);
1170 [ # # ]: 0 : if (!sh)
1171 : : return NULL;
1172 : 0 : nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
1173 : : /* Check port status. */
1174 [ # # ]: 0 : if (spawn->phys_port <= UINT8_MAX) {
1175 : : /* Legacy Verbs api only support u8 port number. */
1176 : 0 : err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1177 : : &port_attr);
1178 [ # # ]: 0 : if (err) {
1179 : 0 : DRV_LOG(ERR, "port query failed: %s", strerror(err));
1180 : 0 : goto error;
1181 : : }
1182 [ # # ]: 0 : if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1183 : 0 : DRV_LOG(ERR, "port is not configured in Ethernet mode");
1184 : : err = EINVAL;
1185 : 0 : goto error;
1186 : : }
1187 [ # # ]: 0 : } else if (nl_rdma >= 0) {
1188 : : /* IB doesn't allow more than 255 ports, must be Ethernet. */
1189 : 0 : err = mlx5_nl_port_state(nl_rdma,
1190 : : spawn->phys_dev_name,
1191 : : spawn->phys_port);
1192 [ # # ]: 0 : if (err < 0) {
1193 : 0 : DRV_LOG(INFO, "Failed to get netlink port state: %s",
1194 : : strerror(rte_errno));
1195 : 0 : err = -rte_errno;
1196 : 0 : goto error;
1197 : : }
1198 : 0 : port_attr.state = (enum ibv_port_state)err;
1199 : : }
1200 [ # # ]: 0 : if (port_attr.state != IBV_PORT_ACTIVE)
1201 : 0 : DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1202 : : mlx5_glue->port_state_str(port_attr.state),
1203 : : port_attr.state);
1204 : : /* Allocate private eth device data. */
1205 : 0 : priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1206 : : sizeof(*priv),
1207 : : RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1208 [ # # ]: 0 : if (priv == NULL) {
1209 : 0 : DRV_LOG(ERR, "priv allocation failure");
1210 : : err = ENOMEM;
1211 : 0 : goto error;
1212 : : }
1213 : : /*
1214 : : * When user configures remote PD and CTX and device creates RxQ by
1215 : : * DevX, external RxQ is both supported and requested.
1216 : : */
1217 [ # # # # : 0 : if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) {
# # ]
1218 : 0 : priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1219 : : sizeof(struct mlx5_external_rxq) *
1220 : : MLX5_MAX_EXT_RX_QUEUES, 0,
1221 : : SOCKET_ID_ANY);
1222 [ # # ]: 0 : if (priv->ext_rxqs == NULL) {
1223 : 0 : DRV_LOG(ERR, "Fail to allocate external RxQ array.");
1224 : : err = ENOMEM;
1225 : 0 : goto error;
1226 : : }
1227 : 0 : DRV_LOG(DEBUG, "External RxQ is supported.");
1228 : : }
1229 : 0 : priv->sh = sh;
1230 : 0 : priv->dev_port = spawn->phys_port;
1231 : 0 : priv->pci_dev = spawn->pci_dev;
1232 : 0 : priv->mtu = RTE_ETHER_MTU;
1233 : : /* Some internal functions rely on Netlink sockets, open them now. */
1234 : 0 : priv->nl_socket_rdma = nl_rdma;
1235 : 0 : priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0);
1236 : 0 : priv->representor = !!switch_info->representor;
1237 : 0 : priv->master = !!switch_info->master;
1238 : 0 : priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1239 : 0 : priv->vport_meta_tag = 0;
1240 : 0 : priv->vport_meta_mask = 0;
1241 : 0 : priv->pf_bond = spawn->pf_bond;
1242 : 0 : priv->mpesw_port = spawn->mpesw_port;
1243 : 0 : priv->mpesw_uplink = false;
1244 : 0 : priv->mpesw_owner = spawn->info.mpesw_owner;
1245 [ # # ]: 0 : if (mlx5_is_port_on_mpesw_device(priv))
1246 : 0 : priv->mpesw_uplink = (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK);
1247 : :
1248 [ # # ]: 0 : DRV_LOG(DEBUG,
1249 : : "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d "
1250 : : "mpesw_port=%d mpesw_uplink=%d",
1251 : : priv->dev_port, dpdk_dev->bus->name,
1252 : : priv->pci_dev ? priv->pci_dev->name : "NONE",
1253 : : priv->master, priv->representor, priv->pf_bond,
1254 : : priv->mpesw_port, priv->mpesw_uplink);
1255 : :
1256 [ # # # # ]: 0 : if (mlx5_is_port_on_mpesw_device(priv) && priv->sh->config.dv_flow_en != 2) {
1257 : 0 : DRV_LOG(ERR, "MPESW device is supported only with HWS");
1258 : : err = ENOTSUP;
1259 : 0 : goto error;
1260 : : }
1261 : : /*
1262 : : * If we have E-Switch we should determine the vport attributes.
1263 : : * E-Switch may use either source vport field or reg_c[0] metadata
1264 : : * register to match on vport index. The engaged part of metadata
1265 : : * register is defined by mask.
1266 : : */
1267 [ # # ]: 0 : if (sh->esw_mode) {
1268 : 0 : err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1269 : : spawn->phys_port,
1270 : : &vport_info);
1271 [ # # ]: 0 : if (err) {
1272 : 0 : DRV_LOG(WARNING,
1273 : : "Cannot query devx port %d on device %s",
1274 : : spawn->phys_port, spawn->phys_dev_name);
1275 : 0 : vport_info.query_flags = 0;
1276 : : }
1277 : : }
1278 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1279 : 0 : priv->vport_meta_tag = vport_info.vport_meta_tag;
1280 : 0 : priv->vport_meta_mask = vport_info.vport_meta_mask;
1281 [ # # ]: 0 : if (!priv->vport_meta_mask) {
1282 : 0 : DRV_LOG(ERR,
1283 : : "vport zero mask for port %d on bonding device %s",
1284 : : spawn->phys_port, spawn->phys_dev_name);
1285 : : err = ENOTSUP;
1286 : 0 : goto error;
1287 : : }
1288 [ # # ]: 0 : if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1289 : 0 : DRV_LOG(ERR,
1290 : : "Invalid vport tag for port %d on bonding device %s",
1291 : : spawn->phys_port, spawn->phys_dev_name);
1292 : : err = ENOTSUP;
1293 : 0 : goto error;
1294 : : }
1295 : : }
1296 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1297 : 0 : priv->vport_id = vport_info.vport_id;
1298 [ # # # # ]: 0 : } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1299 : 0 : DRV_LOG(ERR,
1300 : : "Cannot deduce vport index for port %d on bonding device %s",
1301 : : spawn->phys_port, spawn->phys_dev_name);
1302 : : err = ENOTSUP;
1303 : 0 : goto error;
1304 : : } else {
1305 : : /*
1306 : : * Suppose vport index in compatible way. Kernel/rdma_core
1307 : : * support single E-Switch per PF configurations only and
1308 : : * vport_id field contains the vport index for associated VF,
1309 : : * which is deduced from representor port name.
1310 : : * For example, let's have the IB device port 10, it has
1311 : : * attached network device eth0, which has port name attribute
1312 : : * pf0vf2, we can deduce the VF number as 2, and set vport index
1313 : : * as 3 (2+1). This assigning schema should be changed if the
1314 : : * multiple E-Switch instances per PF configurations or/and PCI
1315 : : * subfunctions are added.
1316 : : */
1317 [ # # ]: 0 : priv->vport_id = switch_info->representor ?
1318 : 0 : switch_info->port_name + 1 : -1;
1319 : : }
1320 : 0 : priv->representor_id = mlx5_representor_id_encode(switch_info,
1321 : : eth_da->type);
1322 : : /*
1323 : : * Look for sibling devices in order to reuse their switch domain
1324 : : * if any, otherwise allocate one.
1325 : : */
1326 [ # # ]: 0 : MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1327 : 0 : const struct mlx5_priv *opriv =
1328 : 0 : rte_eth_devices[port_id].data->dev_private;
1329 : :
1330 [ # # ]: 0 : if (!opriv ||
1331 [ # # ]: 0 : opriv->sh != priv->sh ||
1332 [ # # ]: 0 : opriv->domain_id ==
1333 : : RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1334 : : continue;
1335 : 0 : priv->domain_id = opriv->domain_id;
1336 : 0 : DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1337 : : priv->dev_port, priv->domain_id);
1338 : 0 : break;
1339 : : }
1340 [ # # ]: 0 : if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1341 : 0 : err = rte_eth_switch_domain_alloc(&priv->domain_id);
1342 [ # # ]: 0 : if (err) {
1343 : 0 : err = rte_errno;
1344 : 0 : DRV_LOG(ERR, "unable to allocate switch domain: %s",
1345 : : strerror(rte_errno));
1346 : 0 : goto error;
1347 : : }
1348 : : own_domain_id = 1;
1349 : 0 : DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1350 : : priv->dev_port, priv->domain_id);
1351 : : }
1352 [ # # ]: 0 : if (sh->cdev->config.devx) {
1353 : : struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
1354 : :
1355 : 0 : sh->steering_format_version = hca_attr->steering_format_version;
1356 : : #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
1357 [ # # # # ]: 0 : if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1358 : : sh->config.dv_flow_en) {
1359 [ # # ]: 0 : if (sh->registers.aso_reg != REG_NON) {
1360 : 0 : priv->mtr_en = 1;
1361 : 0 : priv->mtr_reg_share = hca_attr->qos.flow_meter;
1362 : : }
1363 : : }
1364 [ # # ]: 0 : if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1365 : : uint32_t log_obj_size =
1366 : : rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1367 : 0 : if (log_obj_size >=
1368 [ # # ]: 0 : hca_attr->qos.log_meter_aso_granularity &&
1369 : : log_obj_size <=
1370 [ # # ]: 0 : hca_attr->qos.log_meter_aso_max_alloc)
1371 : 0 : sh->meter_aso_en = 1;
1372 : : }
1373 [ # # ]: 0 : if (priv->mtr_en) {
1374 : 0 : err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1375 [ # # ]: 0 : if (err) {
1376 : 0 : err = -err;
1377 : 0 : goto error;
1378 : : }
1379 : : }
1380 [ # # ]: 0 : if (hca_attr->flow.tunnel_header_0_1)
1381 : 0 : sh->tunnel_header_0_1 = 1;
1382 [ # # ]: 0 : if (hca_attr->flow.tunnel_header_2_3)
1383 : 0 : sh->tunnel_header_2_3 = 1;
1384 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
1385 : : #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1386 [ # # # # ]: 0 : if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) {
1387 : 0 : sh->flow_hit_aso_en = 1;
1388 : 0 : err = mlx5_flow_aso_age_mng_init(sh);
1389 [ # # ]: 0 : if (err) {
1390 : 0 : err = -err;
1391 : 0 : goto error;
1392 : : }
1393 : 0 : DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1394 : : }
1395 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1396 : : #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1397 : : defined (HAVE_MLX5_DR_ACTION_ASO_CT)
1398 : : /* HWS create CT ASO SQ based on HWS configure queue number. */
1399 [ # # # # ]: 0 : if (sh->config.dv_flow_en != 2 &&
1400 [ # # ]: 0 : hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) {
1401 : 0 : err = mlx5_flow_aso_ct_mng_init(sh);
1402 [ # # ]: 0 : if (err) {
1403 : 0 : err = -err;
1404 : 0 : goto error;
1405 : : }
1406 : 0 : DRV_LOG(DEBUG, "CT ASO is supported.");
1407 : 0 : sh->ct_aso_en = 1;
1408 : : }
1409 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1410 : : #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1411 [ # # # # ]: 0 : if (hca_attr->log_max_ft_sampler_num > 0 &&
1412 : : sh->config.dv_flow_en) {
1413 : 0 : priv->sampler_en = 1;
1414 : 0 : DRV_LOG(DEBUG, "Sampler enabled!");
1415 : : } else {
1416 : 0 : priv->sampler_en = 0;
1417 [ # # ]: 0 : if (!hca_attr->log_max_ft_sampler_num)
1418 : 0 : DRV_LOG(WARNING,
1419 : : "No available register for sampler.");
1420 : : else
1421 : 0 : DRV_LOG(DEBUG, "DV flow is not supported!");
1422 : : }
1423 : : #endif
1424 [ # # ]: 0 : if (hca_attr->lag_rx_port_affinity) {
1425 : 0 : sh->lag_rx_port_affinity_en = 1;
1426 : 0 : DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled");
1427 : : }
1428 : 0 : priv->num_lag_ports = hca_attr->num_lag_ports;
1429 : 0 : DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports);
1430 : : }
1431 : : /* Process parameters and store port configuration on priv structure. */
1432 : 0 : err = mlx5_port_args_config(priv, mkvlist, &priv->config);
1433 [ # # ]: 0 : if (err) {
1434 : 0 : err = rte_errno;
1435 : 0 : DRV_LOG(ERR, "Failed to process port configure: %s",
1436 : : strerror(rte_errno));
1437 : 0 : goto error;
1438 : : }
1439 : 0 : eth_dev = rte_eth_dev_allocate(name);
1440 [ # # ]: 0 : if (eth_dev == NULL) {
1441 : 0 : DRV_LOG(ERR, "can not allocate rte ethdev");
1442 : : err = ENOMEM;
1443 : 0 : goto error;
1444 : : }
1445 [ # # ]: 0 : if (priv->representor) {
1446 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1447 : 0 : eth_dev->data->representor_id = priv->representor_id;
1448 [ # # ]: 0 : MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1449 : 0 : struct mlx5_priv *opriv =
1450 : 0 : rte_eth_devices[port_id].data->dev_private;
1451 [ # # # # ]: 0 : if (opriv &&
1452 : 0 : opriv->master &&
1453 [ # # ]: 0 : opriv->domain_id == priv->domain_id &&
1454 [ # # ]: 0 : opriv->sh == priv->sh) {
1455 : 0 : eth_dev->data->backer_port_id = port_id;
1456 : 0 : break;
1457 : : }
1458 : : }
1459 [ # # ]: 0 : if (port_id >= RTE_MAX_ETHPORTS)
1460 : 0 : eth_dev->data->backer_port_id = eth_dev->data->port_id;
1461 : : }
1462 : 0 : priv->mp_id.port_id = eth_dev->data->port_id;
1463 : 0 : strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1464 : : /*
1465 : : * Store associated network device interface index. This index
1466 : : * is permanent throughout the lifetime of device. So, we may store
1467 : : * the ifindex here and use the cached value further.
1468 : : */
1469 : : MLX5_ASSERT(spawn->ifindex);
1470 : 0 : priv->if_index = spawn->ifindex;
1471 : 0 : priv->lag_affinity_idx = sh->refcnt - 1;
1472 : 0 : eth_dev->data->dev_private = priv;
1473 : 0 : priv->dev_data = eth_dev->data;
1474 : 0 : eth_dev->data->mac_addrs = priv->mac;
1475 : 0 : eth_dev->device = dpdk_dev;
1476 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1477 : : /* Configure the first MAC address by default. */
1478 [ # # ]: 0 : if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1479 : 0 : DRV_LOG(ERR,
1480 : : "port %u cannot get MAC address, is mlx5_en"
1481 : : " loaded? (errno: %s)",
1482 : : eth_dev->data->port_id, strerror(rte_errno));
1483 : : err = ENODEV;
1484 : 0 : goto error;
1485 : : }
1486 : 0 : DRV_LOG(INFO,
1487 : : "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1488 : : eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1489 : : #ifdef RTE_LIBRTE_MLX5_DEBUG
1490 : : {
1491 : : char ifname[MLX5_NAMESIZE];
1492 : :
1493 : : if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1494 : : DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1495 : : eth_dev->data->port_id, ifname);
1496 : : else
1497 : : DRV_LOG(DEBUG, "port %u ifname is unknown",
1498 : : eth_dev->data->port_id);
1499 : : }
1500 : : #endif
1501 : : /* Get actual MTU if possible. */
1502 : 0 : err = mlx5_get_mtu(eth_dev, &priv->mtu);
1503 [ # # ]: 0 : if (err) {
1504 : 0 : err = rte_errno;
1505 : 0 : goto error;
1506 : : }
1507 : 0 : DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1508 : : priv->mtu);
1509 : : /* Initialize burst functions to prevent crashes before link-up. */
1510 : 0 : eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1511 : 0 : eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1512 : 0 : eth_dev->dev_ops = &mlx5_dev_ops;
1513 : 0 : eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1514 : 0 : eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1515 : 0 : eth_dev->rx_queue_count = mlx5_rx_queue_count;
1516 : : /* Register MAC address. */
1517 : 0 : claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1518 [ # # # # ]: 0 : if (sh->dev_cap.vf && sh->config.vf_nl_en)
1519 : 0 : mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1520 : : mlx5_ifindex(eth_dev),
1521 : 0 : eth_dev->data->mac_addrs,
1522 : : MLX5_MAX_MAC_ADDRESSES);
1523 : 0 : priv->ctrl_flows = 0;
1524 : : rte_spinlock_init(&priv->flow_list_lock);
1525 : 0 : TAILQ_INIT(&priv->flow_meters);
1526 : 0 : priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1527 [ # # ]: 0 : if (!priv->mtr_profile_tbl)
1528 : 0 : goto error;
1529 : : /* Bring Ethernet device up. */
1530 : 0 : DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1531 : : eth_dev->data->port_id);
1532 : : /* Read link status in case it is up and there will be no event. */
1533 : 0 : mlx5_link_update(eth_dev, 0);
1534 : : /* Watch LSC interrupts between port probe and port start. */
1535 : 0 : priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
1536 : 0 : eth_dev->data->port_id;
1537 : 0 : mlx5_set_link_up(eth_dev);
1538 [ # # ]: 0 : for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1539 : 0 : icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1540 [ # # ]: 0 : if (sh->config.reclaim_mode)
1541 : 0 : icfg[i].per_core_cache = 0;
1542 : 0 : priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1543 [ # # ]: 0 : if (!priv->flows[i])
1544 : 0 : goto error;
1545 : : }
1546 : : /* Create context for virtual machine VLAN workaround. */
1547 : 0 : priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1548 [ # # ]: 0 : if (sh->config.dv_flow_en) {
1549 : 0 : err = mlx5_alloc_shared_dr(priv);
1550 [ # # ]: 0 : if (err)
1551 : 0 : goto error;
1552 [ # # ]: 0 : if (mlx5_flex_item_port_init(eth_dev) < 0)
1553 : 0 : goto error;
1554 : : }
1555 [ # # ]: 0 : if (mlx5_devx_obj_ops_en(sh)) {
1556 : 0 : priv->obj_ops = devx_obj_ops;
1557 : 0 : mlx5_queue_counter_id_prepare(eth_dev);
1558 : 0 : priv->obj_ops.lb_dummy_queue_create =
1559 : : mlx5_rxq_ibv_obj_dummy_lb_create;
1560 : 0 : priv->obj_ops.lb_dummy_queue_release =
1561 : : mlx5_rxq_ibv_obj_dummy_lb_release;
1562 [ # # ]: 0 : } else if (spawn->max_port > UINT8_MAX) {
1563 : : /* Verbs can't support ports larger than 255 by design. */
1564 : 0 : DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1565 : : err = ENOTSUP;
1566 : 0 : goto error;
1567 : : } else {
1568 : 0 : priv->obj_ops = ibv_obj_ops;
1569 : : }
1570 [ # # ]: 0 : if (sh->config.tx_pp &&
1571 [ # # ]: 0 : priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1572 : : /*
1573 : : * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1574 : : * packet pacing and already checked above.
1575 : : * Hence, we should only make sure the SQs will be created
1576 : : * with DevX, not with Verbs.
1577 : : * Verbs allocates the SQ UAR on its own and it can't be shared
1578 : : * with Clock Queue UAR as required for Tx scheduling.
1579 : : */
1580 : 0 : DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1581 : : err = ENODEV;
1582 : 0 : goto error;
1583 : : }
1584 : 0 : priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1585 [ # # ]: 0 : if (!priv->drop_queue.hrxq)
1586 : 0 : goto error;
1587 : 0 : priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1588 : : mlx5_hrxq_create_cb,
1589 : : mlx5_hrxq_match_cb,
1590 : : mlx5_hrxq_remove_cb,
1591 : : mlx5_hrxq_clone_cb,
1592 : : mlx5_hrxq_clone_free_cb);
1593 [ # # ]: 0 : if (!priv->hrxqs)
1594 : 0 : goto error;
1595 : 0 : mlx5_set_metadata_mask(eth_dev);
1596 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1597 [ # # ]: 0 : !priv->sh->dv_regc0_mask) {
1598 : 0 : DRV_LOG(ERR, "metadata mode %u is not supported "
1599 : : "(no metadata reg_c[0] is available)",
1600 : : sh->config.dv_xmeta_en);
1601 : : err = ENOTSUP;
1602 : 0 : goto error;
1603 : : }
1604 : : rte_rwlock_init(&priv->ind_tbls_lock);
1605 [ # # ]: 0 : if (sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_UNKNOWN) {
1606 [ # # ]: 0 : if (!sh->cdev->config.hca_attr.modify_outer_ipv6_traffic_class ||
1607 [ # # # # ]: 0 : (sh->config.dv_flow_en == 1 && mlx5_flow_discover_ipv6_tc_support(eth_dev)))
1608 : 0 : sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_FALLBACK;
1609 : : else
1610 : 0 : sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_OK;
1611 : : }
1612 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2) {
1613 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1614 [ # # ]: 0 : if (priv->sh->config.dv_esw_en) {
1615 : : uint32_t usable_bits;
1616 : : uint32_t required_bits;
1617 : :
1618 [ # # ]: 0 : if (priv->sh->dv_regc0_mask == UINT32_MAX) {
1619 : 0 : DRV_LOG(ERR, "E-Switch port metadata is required when using HWS "
1620 : : "but it is disabled (configure it through devlink)");
1621 : : err = ENOTSUP;
1622 : 0 : goto error;
1623 : : }
1624 [ # # ]: 0 : if (priv->sh->dv_regc0_mask == 0) {
1625 : 0 : DRV_LOG(ERR, "E-Switch with HWS is not supported "
1626 : : "(no available bits in reg_c[0])");
1627 : : err = ENOTSUP;
1628 : 0 : goto error;
1629 : : }
1630 : : usable_bits = rte_popcount32(priv->sh->dv_regc0_mask);
1631 : 0 : required_bits = rte_popcount32(priv->vport_meta_mask);
1632 [ # # ]: 0 : if (usable_bits < required_bits) {
1633 : 0 : DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide "
1634 : : "representor matching.");
1635 : : err = ENOTSUP;
1636 : 0 : goto error;
1637 : : }
1638 : : }
1639 [ # # ]: 0 : if (priv->vport_meta_mask)
1640 : 0 : flow_hw_set_port_info(eth_dev);
1641 [ # # ]: 0 : if (priv->sh->config.dv_esw_en &&
1642 [ # # # # ]: 0 : priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1643 : : priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) {
1644 : 0 : DRV_LOG(ERR,
1645 : : "metadata mode %u is not supported in HWS eswitch mode",
1646 : : priv->sh->config.dv_xmeta_en);
1647 : : err = ENOTSUP;
1648 : 0 : goto error;
1649 : : }
1650 [ # # # # ]: 0 : if (priv->sh->config.dv_esw_en &&
1651 : 0 : flow_hw_create_vport_action(eth_dev)) {
1652 : 0 : DRV_LOG(ERR, "port %u failed to create vport action",
1653 : : eth_dev->data->port_id);
1654 : : err = EINVAL;
1655 : 0 : goto error;
1656 : : }
1657 : : /*
1658 : : * If representor matching is disabled, PMD cannot create default flow rules
1659 : : * to receive traffic for all ports, since implicit source port match is not added.
1660 : : * Isolated mode is forced.
1661 : : */
1662 [ # # # # ]: 0 : if (priv->sh->config.dv_esw_en && !priv->sh->config.repr_matching) {
1663 : 0 : err = mlx5_flow_isolate(eth_dev, 1, NULL);
1664 [ # # ]: 0 : if (err < 0) {
1665 : 0 : err = -err;
1666 : 0 : goto error;
1667 : : }
1668 : 0 : DRV_LOG(WARNING, "port %u ingress traffic is restricted to defined "
1669 : : "flow rules (isolated mode) since representor "
1670 : : "matching is disabled",
1671 : : eth_dev->data->port_id);
1672 : : }
1673 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1674 : 0 : return eth_dev;
1675 : : #else
1676 : : DRV_LOG(ERR, "DV support is missing for HWS.");
1677 : : goto error;
1678 : : #endif
1679 : : }
1680 [ # # ]: 0 : if (!priv->sh->flow_priority_check_flag) {
1681 : : /* Supported Verbs flow priority number detection. */
1682 : 0 : err = mlx5_flow_discover_priorities(eth_dev);
1683 : 0 : priv->sh->flow_max_priority = err;
1684 : 0 : priv->sh->flow_priority_check_flag = 1;
1685 : : } else {
1686 : 0 : err = priv->sh->flow_max_priority;
1687 : : }
1688 [ # # ]: 0 : if (err < 0) {
1689 : 0 : err = -err;
1690 : 0 : goto error;
1691 : : }
1692 : : /* Query availability of metadata reg_c's. */
1693 [ # # ]: 0 : if (!priv->sh->metadata_regc_check_flag) {
1694 : 0 : err = mlx5_flow_discover_mreg_c(eth_dev);
1695 [ # # ]: 0 : if (err < 0) {
1696 : 0 : err = -err;
1697 : 0 : goto error;
1698 : : }
1699 : : }
1700 [ # # ]: 0 : if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1701 : 0 : DRV_LOG(DEBUG,
1702 : : "port %u extensive metadata register is not supported",
1703 : : eth_dev->data->port_id);
1704 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1705 : 0 : DRV_LOG(ERR, "metadata mode %u is not supported "
1706 : : "(no metadata registers available)",
1707 : : sh->config.dv_xmeta_en);
1708 : : err = ENOTSUP;
1709 : 0 : goto error;
1710 : : }
1711 : : }
1712 [ # # ]: 0 : if (sh->config.dv_flow_en &&
1713 [ # # # # ]: 0 : sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1714 : 0 : mlx5_flow_ext_mreg_supported(eth_dev) &&
1715 [ # # ]: 0 : priv->sh->dv_regc0_mask) {
1716 : 0 : priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1717 : : MLX5_FLOW_MREG_HTABLE_SZ,
1718 : : false, true, eth_dev,
1719 : : flow_dv_mreg_create_cb,
1720 : : flow_dv_mreg_match_cb,
1721 : : flow_dv_mreg_remove_cb,
1722 : : flow_dv_mreg_clone_cb,
1723 : : flow_dv_mreg_clone_free_cb);
1724 [ # # ]: 0 : if (!priv->mreg_cp_tbl) {
1725 : : err = ENOMEM;
1726 : 0 : goto error;
1727 : : }
1728 : : }
1729 : : rte_spinlock_init(&priv->shared_act_sl);
1730 : 0 : mlx5_flow_counter_mode_config(eth_dev);
1731 : 0 : mlx5_flow_drop_action_config(eth_dev);
1732 [ # # ]: 0 : if (sh->config.dv_flow_en)
1733 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1734 : : return eth_dev;
1735 : 0 : error:
1736 [ # # ]: 0 : if (priv) {
1737 : 0 : priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
1738 : : RTE_MAX_ETHPORTS;
1739 : 0 : rte_io_wmb();
1740 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1741 [ # # ]: 0 : if (eth_dev &&
1742 [ # # ]: 0 : priv->sh &&
1743 [ # # ]: 0 : priv->sh->config.dv_flow_en == 2 &&
1744 : : priv->sh->config.dv_esw_en)
1745 : 0 : flow_hw_destroy_vport_action(eth_dev);
1746 : : #endif
1747 [ # # ]: 0 : if (priv->mreg_cp_tbl)
1748 : 0 : mlx5_hlist_destroy(priv->mreg_cp_tbl);
1749 [ # # ]: 0 : if (priv->sh)
1750 : 0 : mlx5_os_free_shared_dr(priv);
1751 [ # # ]: 0 : if (priv->nl_socket_route >= 0)
1752 : 0 : close(priv->nl_socket_route);
1753 [ # # ]: 0 : if (priv->vmwa_context)
1754 : 0 : mlx5_vlan_vmwa_exit(priv->vmwa_context);
1755 [ # # # # ]: 0 : if (eth_dev && priv->drop_queue.hrxq)
1756 : 0 : mlx5_drop_action_destroy(eth_dev);
1757 [ # # ]: 0 : if (priv->mtr_profile_tbl)
1758 : 0 : mlx5_l3t_destroy(priv->mtr_profile_tbl);
1759 [ # # ]: 0 : if (own_domain_id)
1760 : 0 : claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1761 [ # # ]: 0 : if (priv->hrxqs)
1762 : 0 : mlx5_list_destroy(priv->hrxqs);
1763 [ # # # # ]: 0 : if (eth_dev && priv->flex_item_map)
1764 : 0 : mlx5_flex_item_port_cleanup(eth_dev);
1765 : 0 : mlx5_free(priv->ext_rxqs);
1766 : 0 : mlx5_free(priv);
1767 [ # # ]: 0 : if (eth_dev != NULL)
1768 : 0 : eth_dev->data->dev_private = NULL;
1769 : : }
1770 [ # # ]: 0 : if (eth_dev != NULL) {
1771 : : /* mac_addrs must not be freed alone because part of
1772 : : * dev_private
1773 : : **/
1774 : 0 : eth_dev->data->mac_addrs = NULL;
1775 : 0 : rte_eth_dev_release_port(eth_dev);
1776 : : }
1777 : : if (sh)
1778 : 0 : mlx5_free_shared_dev_ctx(sh);
1779 [ # # ]: 0 : if (nl_rdma >= 0)
1780 : 0 : close(nl_rdma);
1781 : : MLX5_ASSERT(err > 0);
1782 : 0 : rte_errno = err;
1783 : 0 : return NULL;
1784 : : }
1785 : :
1786 : : /**
1787 : : * Comparison callback to sort device data.
1788 : : *
1789 : : * This is meant to be used with qsort().
1790 : : *
1791 : : * @param a[in]
1792 : : * Pointer to pointer to first data object.
1793 : : * @param b[in]
1794 : : * Pointer to pointer to second data object.
1795 : : *
1796 : : * @return
1797 : : * 0 if both objects are equal, less than 0 if the first argument is less
1798 : : * than the second, greater than 0 otherwise.
1799 : : */
1800 : : static int
1801 : 0 : mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1802 : : {
1803 : : const struct mlx5_switch_info *si_a =
1804 : : &((const struct mlx5_dev_spawn_data *)a)->info;
1805 : : const struct mlx5_switch_info *si_b =
1806 : : &((const struct mlx5_dev_spawn_data *)b)->info;
1807 : 0 : int uplink_a = si_a->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
1808 : 0 : int uplink_b = si_b->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
1809 : : int ret;
1810 : :
1811 : : /* Uplink ports first. */
1812 : 0 : ret = uplink_b - uplink_a;
1813 [ # # ]: 0 : if (ret)
1814 : : return ret;
1815 : : /* Then master devices. */
1816 : 0 : ret = si_b->master - si_a->master;
1817 [ # # ]: 0 : if (ret)
1818 : : return ret;
1819 : : /* Then representor devices. */
1820 : 0 : ret = si_b->representor - si_a->representor;
1821 [ # # ]: 0 : if (ret)
1822 : : return ret;
1823 : : /* Unidentified devices come last in no specific order. */
1824 [ # # ]: 0 : if (!si_a->representor)
1825 : : return 0;
1826 : : /* Order representors by name. */
1827 : 0 : return si_a->port_name - si_b->port_name;
1828 : : }
1829 : :
1830 : : /**
1831 : : * Match PCI information for possible slaves of bonding device.
1832 : : *
1833 : : * @param[in] ibdev_name
1834 : : * Name of Infiniband device.
1835 : : * @param[in] pci_dev
1836 : : * Pointer to primary PCI address structure to match.
1837 : : * @param[in] nl_rdma
1838 : : * Netlink RDMA group socket handle.
1839 : : * @param[in] owner
1840 : : * Representor owner PF index.
1841 : : * @param[out] bond_info
1842 : : * Pointer to bonding information.
1843 : : *
1844 : : * @return
1845 : : * negative value if no bonding device found, otherwise
1846 : : * positive index of slave PF in bonding.
1847 : : */
1848 : : static int
1849 : 0 : mlx5_device_bond_pci_match(const char *ibdev_name,
1850 : : const struct rte_pci_addr *pci_dev,
1851 : : int nl_rdma, uint16_t owner,
1852 : : struct mlx5_bond_info *bond_info)
1853 : : {
1854 : : char ifname[IF_NAMESIZE + 1];
1855 : : unsigned int ifindex;
1856 : : unsigned int np, i;
1857 : : FILE *bond_file = NULL, *file;
1858 : : int pf = -1;
1859 : : int ret;
1860 : 0 : uint8_t cur_guid[32] = {0};
1861 [ # # ]: 0 : uint8_t guid[32] = {0};
1862 : :
1863 : : /*
1864 : : * Try to get master device name. If something goes wrong suppose
1865 : : * the lack of kernel support and no bonding devices.
1866 : : */
1867 : : memset(bond_info, 0, sizeof(*bond_info));
1868 [ # # ]: 0 : if (nl_rdma < 0)
1869 : : return -1;
1870 [ # # ]: 0 : if (!strstr(ibdev_name, "bond"))
1871 : : return -1;
1872 : 0 : np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1873 [ # # ]: 0 : if (!np)
1874 : : return -1;
1875 [ # # ]: 0 : if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1876 : : return -1;
1877 : : /*
1878 : : * The master device might not be on the predefined port(not on port
1879 : : * index 1, it is not guaranteed), we have to scan all Infiniband
1880 : : * device ports and find master.
1881 : : */
1882 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
1883 : : /* Check whether Infiniband port is populated. */
1884 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1885 [ # # ]: 0 : if (!ifindex)
1886 : 0 : continue;
1887 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
1888 : 0 : continue;
1889 : : /* Try to read bonding slave names from sysfs. */
1890 : 0 : MKSTR(slaves,
1891 : : "/sys/class/net/%s/master/bonding/slaves", ifname);
1892 : 0 : bond_file = fopen(slaves, "r");
1893 [ # # ]: 0 : if (bond_file)
1894 : : break;
1895 : : }
1896 [ # # ]: 0 : if (!bond_file)
1897 : : return -1;
1898 : : /* Use safe format to check maximal buffer length. */
1899 : : MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1900 [ # # ]: 0 : while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1901 : : char tmp_str[IF_NAMESIZE + 32];
1902 : : struct rte_pci_addr pci_addr;
1903 : : struct mlx5_switch_info info;
1904 : : int ret;
1905 : :
1906 : : /* Process slave interface names in the loop. */
1907 : : snprintf(tmp_str, sizeof(tmp_str),
1908 : : "/sys/class/net/%s", ifname);
1909 [ # # ]: 0 : if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1910 : 0 : DRV_LOG(WARNING,
1911 : : "Cannot get PCI address for netdev \"%s\".",
1912 : : ifname);
1913 : 0 : continue;
1914 : : }
1915 : : /* Slave interface PCI address match found. */
1916 : : snprintf(tmp_str, sizeof(tmp_str),
1917 : : "/sys/class/net/%s/phys_port_name", ifname);
1918 : 0 : file = fopen(tmp_str, "rb");
1919 [ # # ]: 0 : if (!file)
1920 : : break;
1921 : 0 : info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1922 [ # # ]: 0 : if (fscanf(file, "%32s", tmp_str) == 1)
1923 : 0 : mlx5_translate_port_name(tmp_str, &info);
1924 : 0 : fclose(file);
1925 : : /* Only process PF ports. */
1926 [ # # ]: 0 : if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1927 : : info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1928 : 0 : continue;
1929 : : /* Check max bonding member. */
1930 [ # # ]: 0 : if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1931 : 0 : DRV_LOG(WARNING, "bonding index out of range, "
1932 : : "please increase MLX5_BOND_MAX_PORTS: %s",
1933 : : tmp_str);
1934 : 0 : break;
1935 : : }
1936 : : /* Get ifindex. */
1937 : : snprintf(tmp_str, sizeof(tmp_str),
1938 : : "/sys/class/net/%s/ifindex", ifname);
1939 : 0 : file = fopen(tmp_str, "rb");
1940 [ # # ]: 0 : if (!file)
1941 : : break;
1942 : 0 : ret = fscanf(file, "%u", &ifindex);
1943 : 0 : fclose(file);
1944 [ # # ]: 0 : if (ret != 1)
1945 : : break;
1946 : : /* Save bonding info. */
1947 : 0 : strncpy(bond_info->ports[info.port_name].ifname, ifname,
1948 : : sizeof(bond_info->ports[0].ifname));
1949 : 0 : bond_info->ports[info.port_name].pci_addr = pci_addr;
1950 : 0 : bond_info->ports[info.port_name].ifindex = ifindex;
1951 : 0 : bond_info->n_port++;
1952 : : /*
1953 : : * Under socket direct mode, bonding will use
1954 : : * system_image_guid as identification.
1955 : : * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1956 : : * All bonding members should have the same guid even if driver
1957 : : * is using PCIe BDF.
1958 : : */
1959 : 0 : ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1960 [ # # ]: 0 : if (ret < 0)
1961 : : break;
1962 [ # # ]: 0 : else if (ret > 0) {
1963 [ # # ]: 0 : if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1964 [ # # # # ]: 0 : owner == info.port_name &&
1965 [ # # ]: 0 : (owner != 0 || (owner == 0 &&
1966 : 0 : !rte_pci_addr_cmp(pci_dev, &pci_addr))))
1967 : 0 : pf = info.port_name;
1968 [ # # ]: 0 : } else if (pci_dev->domain == pci_addr.domain &&
1969 [ # # ]: 0 : pci_dev->bus == pci_addr.bus &&
1970 : 0 : pci_dev->devid == pci_addr.devid &&
1971 [ # # ]: 0 : ((pci_dev->function == 0 &&
1972 [ # # ]: 0 : pci_dev->function + owner == pci_addr.function) ||
1973 [ # # ]: 0 : (pci_dev->function == owner &&
1974 [ # # ]: 0 : pci_addr.function == owner)))
1975 : 0 : pf = info.port_name;
1976 : : }
1977 [ # # ]: 0 : if (pf >= 0) {
1978 : : /* Get bond interface info */
1979 : 0 : ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1980 : 0 : bond_info->ifname);
1981 [ # # ]: 0 : if (ret)
1982 : 0 : DRV_LOG(ERR, "unable to get bond info: %s",
1983 : : strerror(rte_errno));
1984 : : else
1985 : 0 : DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1986 : : ifindex, bond_info->ifindex, bond_info->ifname);
1987 : : }
1988 [ # # ]: 0 : if (owner == 0 && pf != 0) {
1989 : 0 : DRV_LOG(INFO, "PCIe instance " PCI_PRI_FMT " isn't bonding owner",
1990 : : pci_dev->domain, pci_dev->bus, pci_dev->devid,
1991 : : pci_dev->function);
1992 : : }
1993 : : return pf;
1994 : : }
1995 : :
1996 : : static int
1997 : 0 : mlx5_nl_esw_multiport_get(struct rte_pci_addr *pci_addr, int *enabled)
1998 : : {
1999 : 0 : char pci_addr_str[PCI_PRI_STR_SIZE] = { 0 };
2000 : : int nlsk_fd;
2001 : : int devlink_id;
2002 : : int ret;
2003 : :
2004 : : /* Provide correct value to have defined enabled state in case of an error. */
2005 : 0 : *enabled = 0;
2006 : 0 : rte_pci_device_name(pci_addr, pci_addr_str, sizeof(pci_addr_str));
2007 : 0 : nlsk_fd = mlx5_nl_init(NETLINK_GENERIC, 0);
2008 [ # # ]: 0 : if (nlsk_fd < 0)
2009 : : return nlsk_fd;
2010 : 0 : devlink_id = mlx5_nl_devlink_family_id_get(nlsk_fd);
2011 [ # # ]: 0 : if (devlink_id < 0) {
2012 : : ret = devlink_id;
2013 : 0 : DRV_LOG(DEBUG, "Unable to get devlink family id for Multiport E-Switch checks "
2014 : : "by netlink, for PCI device %s", pci_addr_str);
2015 : 0 : goto close_nlsk_fd;
2016 : : }
2017 : 0 : ret = mlx5_nl_devlink_esw_multiport_get(nlsk_fd, devlink_id, pci_addr_str, enabled);
2018 [ # # ]: 0 : if (ret < 0)
2019 : 0 : DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by Netlink.");
2020 : 0 : close_nlsk_fd:
2021 : 0 : close(nlsk_fd);
2022 : 0 : return ret;
2023 : : }
2024 : :
2025 : : #define SYSFS_MPESW_PARAM_MAX_LEN 16
2026 : :
2027 : : static int
2028 : 0 : mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled)
2029 : : {
2030 : : int nl_rdma;
2031 : : unsigned int n_ports;
2032 : : unsigned int i;
2033 : : int ret;
2034 : :
2035 : : /* Provide correct value to have defined enabled state in case of an error. */
2036 : 0 : *enabled = 0;
2037 : 0 : nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2038 [ # # ]: 0 : if (nl_rdma < 0)
2039 : : return nl_rdma;
2040 : 0 : n_ports = mlx5_nl_portnum(nl_rdma, ibv->name);
2041 [ # # ]: 0 : if (!n_ports) {
2042 : 0 : ret = -rte_errno;
2043 : 0 : goto close_nl_rdma;
2044 : : }
2045 [ # # ]: 0 : for (i = 1; i <= n_ports; ++i) {
2046 : : unsigned int ifindex;
2047 : : char ifname[IF_NAMESIZE + 1];
2048 : : struct rte_pci_addr if_pci_addr;
2049 : : char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1];
2050 : : FILE *sysfs;
2051 : : int n;
2052 : :
2053 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i);
2054 [ # # ]: 0 : if (!ifindex)
2055 : 0 : continue;
2056 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2057 : 0 : continue;
2058 : 0 : MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname);
2059 [ # # ]: 0 : if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr))
2060 : 0 : continue;
2061 [ # # ]: 0 : if (pci_addr->domain != if_pci_addr.domain ||
2062 [ # # ]: 0 : pci_addr->bus != if_pci_addr.bus ||
2063 : 0 : pci_addr->devid != if_pci_addr.devid ||
2064 [ # # ]: 0 : pci_addr->function != if_pci_addr.function)
2065 : 0 : continue;
2066 : 0 : MKSTR(sysfs_mpesw_path,
2067 : : "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname);
2068 : 0 : sysfs = fopen(sysfs_mpesw_path, "r");
2069 [ # # ]: 0 : if (!sysfs)
2070 : 0 : continue;
2071 : 0 : n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw);
2072 : 0 : fclose(sysfs);
2073 [ # # ]: 0 : if (n != 1)
2074 : 0 : continue;
2075 : : ret = 0;
2076 [ # # ]: 0 : if (strcmp(mpesw, "multiport_esw") == 0) {
2077 : 0 : *enabled = 1;
2078 : 0 : break;
2079 : : }
2080 : 0 : *enabled = 0;
2081 : 0 : break;
2082 : : }
2083 [ # # ]: 0 : if (i > n_ports) {
2084 : 0 : DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs.");
2085 : 0 : rte_errno = ENOENT;
2086 : : ret = -rte_errno;
2087 : : }
2088 : :
2089 : 0 : close_nl_rdma:
2090 : 0 : close(nl_rdma);
2091 : 0 : return ret;
2092 : : }
2093 : :
2094 : : static int
2095 : 0 : mlx5_is_mpesw_enabled(struct ibv_device *ibv, struct rte_pci_addr *ibv_pci_addr, int *enabled)
2096 : : {
2097 : : /*
2098 : : * Try getting Multiport E-Switch state through netlink interface
2099 : : * If unable, try sysfs interface. If that is unable as well,
2100 : : * assume that Multiport E-Switch is disabled and return an error.
2101 : : */
2102 [ # # # # ]: 0 : if (mlx5_nl_esw_multiport_get(ibv_pci_addr, enabled) >= 0 ||
2103 : 0 : mlx5_sysfs_esw_multiport_get(ibv, ibv_pci_addr, enabled) >= 0)
2104 : 0 : return 0;
2105 : 0 : DRV_LOG(DEBUG, "Unable to check MPESW state for IB device %s "
2106 : : "(PCI: " PCI_PRI_FMT ")",
2107 : : ibv->name,
2108 : : ibv_pci_addr->domain, ibv_pci_addr->bus,
2109 : : ibv_pci_addr->devid, ibv_pci_addr->function);
2110 : 0 : *enabled = 0;
2111 : 0 : return -rte_errno;
2112 : : }
2113 : :
2114 : : static int
2115 : 0 : mlx5_device_mpesw_pci_match(struct ibv_device *ibv,
2116 : : const struct rte_pci_addr *owner_pci,
2117 : : int nl_rdma)
2118 : : {
2119 : 0 : struct rte_pci_addr ibdev_pci_addr = { 0 };
2120 : 0 : char ifname[IF_NAMESIZE + 1] = { 0 };
2121 : : unsigned int ifindex;
2122 : : unsigned int np;
2123 : : unsigned int i;
2124 : 0 : int enabled = 0;
2125 : : int ret;
2126 : :
2127 : : /* Check if IB device's PCI address matches the probed PCI address. */
2128 [ # # ]: 0 : if (mlx5_get_pci_addr(ibv->ibdev_path, &ibdev_pci_addr)) {
2129 : 0 : DRV_LOG(DEBUG, "Skipping MPESW check for IB device %s since "
2130 : : "there is no underlying PCI device", ibv->name);
2131 : 0 : rte_errno = ENOENT;
2132 : 0 : return -rte_errno;
2133 : : }
2134 [ # # ]: 0 : if (ibdev_pci_addr.domain != owner_pci->domain ||
2135 [ # # ]: 0 : ibdev_pci_addr.bus != owner_pci->bus ||
2136 : 0 : ibdev_pci_addr.devid != owner_pci->devid ||
2137 [ # # ]: 0 : ibdev_pci_addr.function != owner_pci->function) {
2138 : : return -1;
2139 : : }
2140 : : /* Check if IB device has MPESW enabled. */
2141 [ # # ]: 0 : if (mlx5_is_mpesw_enabled(ibv, &ibdev_pci_addr, &enabled))
2142 : : return -1;
2143 [ # # ]: 0 : if (!enabled)
2144 : : return -1;
2145 : : /* Iterate through IB ports to find MPESW master uplink port. */
2146 [ # # ]: 0 : if (nl_rdma < 0)
2147 : : return -1;
2148 : 0 : np = mlx5_nl_portnum(nl_rdma, ibv->name);
2149 [ # # ]: 0 : if (!np)
2150 : : return -1;
2151 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2152 : : struct rte_pci_addr pci_addr;
2153 : : FILE *file;
2154 : : char port_name[IF_NAMESIZE + 1];
2155 : : struct mlx5_switch_info info;
2156 : :
2157 : : /* Check whether IB port has a corresponding netdev. */
2158 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i);
2159 [ # # ]: 0 : if (!ifindex)
2160 : 0 : continue;
2161 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2162 : 0 : continue;
2163 : : /* Read port name and determine its type. */
2164 : 0 : MKSTR(ifphysportname, "/sys/class/net/%s/phys_port_name", ifname);
2165 : 0 : file = fopen(ifphysportname, "rb");
2166 [ # # ]: 0 : if (!file)
2167 : 0 : continue;
2168 : 0 : ret = fscanf(file, "%16s", port_name);
2169 : 0 : fclose(file);
2170 [ # # ]: 0 : if (ret != 1)
2171 : 0 : continue;
2172 : : memset(&info, 0, sizeof(info));
2173 : 0 : mlx5_translate_port_name(port_name, &info);
2174 [ # # ]: 0 : if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2175 : 0 : continue;
2176 : : /* Fetch PCI address of the device to which the netdev is bound. */
2177 : 0 : MKSTR(ifpath, "/sys/class/net/%s", ifname);
2178 [ # # ]: 0 : if (mlx5_get_pci_addr(ifpath, &pci_addr))
2179 : 0 : continue;
2180 [ # # ]: 0 : if (pci_addr.domain == ibdev_pci_addr.domain &&
2181 : : pci_addr.bus == ibdev_pci_addr.bus &&
2182 [ # # ]: 0 : pci_addr.devid == ibdev_pci_addr.devid &&
2183 : : pci_addr.function == ibdev_pci_addr.function) {
2184 : : MLX5_ASSERT(info.port_name >= 0);
2185 : 0 : return info.port_name;
2186 : : }
2187 : : }
2188 : : /* No matching MPESW uplink port was found. */
2189 : : return -1;
2190 : : }
2191 : :
2192 : : /**
2193 : : * Register a PCI device within bonding.
2194 : : *
2195 : : * This function spawns Ethernet devices out of a given PCI device and
2196 : : * bonding owner PF index.
2197 : : *
2198 : : * @param[in] cdev
2199 : : * Pointer to common mlx5 device structure.
2200 : : * @param[in] req_eth_da
2201 : : * Requested ethdev device argument.
2202 : : * @param[in] owner_id
2203 : : * Requested owner PF port ID within bonding device, default to 0.
2204 : : * @param[in, out] mkvlist
2205 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2206 : : *
2207 : : * @return
2208 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2209 : : */
2210 : : static int
2211 : 0 : mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2212 : : struct rte_eth_devargs *req_eth_da,
2213 : : uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)
2214 : 0 : {
2215 : : struct ibv_device **ibv_list;
2216 : : /*
2217 : : * Number of found IB Devices matching with requested PCI BDF.
2218 : : * nd != 1 means there are multiple IB devices over the same
2219 : : * PCI device and we have representors and master.
2220 : : */
2221 : : unsigned int nd = 0;
2222 : : /*
2223 : : * Number of found IB device Ports. nd = 1 and np = 1..n means
2224 : : * we have the single multiport IB device, and there may be
2225 : : * representors attached to some of found ports.
2226 : : */
2227 : : unsigned int np = 0;
2228 : : /*
2229 : : * Number of DPDK ethernet devices to Spawn - either over
2230 : : * multiple IB devices or multiple ports of single IB device.
2231 : : * Actually this is the number of iterations to spawn.
2232 : : */
2233 : : unsigned int ns = 0;
2234 : : /*
2235 : : * Bonding device
2236 : : * < 0 - no bonding device (single one)
2237 : : * >= 0 - bonding device (value is slave PF index)
2238 : : */
2239 : : int bd = -1;
2240 : : /*
2241 : : * Multiport E-Switch (MPESW) device:
2242 : : * < 0 - no MPESW device or could not determine if it is MPESW device,
2243 : : * >= 0 - MPESW device. Value is the port index of the MPESW owner.
2244 : : */
2245 : : int mpesw = MLX5_MPESW_PORT_INVALID;
2246 : 0 : struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2247 : : struct mlx5_dev_spawn_data *list = NULL;
2248 : 0 : struct rte_eth_devargs eth_da = *req_eth_da;
2249 : 0 : struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2250 : : struct mlx5_bond_info bond_info;
2251 : 0 : int ret = -1;
2252 : :
2253 : 0 : errno = 0;
2254 : 0 : ibv_list = mlx5_glue->get_device_list(&ret);
2255 [ # # ]: 0 : if (!ibv_list) {
2256 [ # # ]: 0 : rte_errno = errno ? errno : ENOSYS;
2257 : 0 : DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2258 : 0 : return -rte_errno;
2259 : : }
2260 : : /*
2261 : : * First scan the list of all Infiniband devices to find
2262 : : * matching ones, gathering into the list.
2263 : : */
2264 : 0 : struct ibv_device *ibv_match[ret + 1];
2265 : 0 : int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0);
2266 : 0 : int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2267 : : unsigned int i;
2268 : :
2269 [ # # ]: 0 : while (ret-- > 0) {
2270 : : struct rte_pci_addr pci_addr;
2271 : :
2272 : 0 : DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2273 : 0 : bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2274 : : nl_rdma, owner_id, &bond_info);
2275 [ # # ]: 0 : if (bd >= 0) {
2276 : : /*
2277 : : * Bonding device detected. Only one match is allowed,
2278 : : * the bonding is supported over multi-port IB device,
2279 : : * there should be no matches on representor PCI
2280 : : * functions or non VF LAG bonding devices with
2281 : : * specified address.
2282 : : */
2283 [ # # ]: 0 : if (nd) {
2284 : 0 : DRV_LOG(ERR,
2285 : : "multiple PCI match on bonding device"
2286 : : "\"%s\" found", ibv_list[ret]->name);
2287 : 0 : rte_errno = ENOENT;
2288 : 0 : ret = -rte_errno;
2289 : 0 : goto exit;
2290 : : }
2291 : : /* Amend owner pci address if owner PF ID specified. */
2292 [ # # ]: 0 : if (eth_da.nb_representor_ports)
2293 : 0 : owner_pci.function += owner_id;
2294 : 0 : DRV_LOG(INFO,
2295 : : "PCI information matches for slave %d bonding device \"%s\"",
2296 : : bd, ibv_list[ret]->name);
2297 : 0 : ibv_match[nd++] = ibv_list[ret];
2298 : 0 : break;
2299 : : }
2300 : 0 : mpesw = mlx5_device_mpesw_pci_match(ibv_list[ret], &owner_pci, nl_rdma);
2301 [ # # ]: 0 : if (mpesw >= 0) {
2302 : : /*
2303 : : * MPESW device detected. Only one matching IB device is allowed,
2304 : : * so if any matches were found previously, fail gracefully.
2305 : : */
2306 [ # # ]: 0 : if (nd) {
2307 : 0 : DRV_LOG(ERR,
2308 : : "PCI information matches MPESW device \"%s\", "
2309 : : "but multiple matching PCI devices were found. "
2310 : : "Probing failed.",
2311 : : ibv_list[ret]->name);
2312 : 0 : rte_errno = ENOENT;
2313 : 0 : ret = -rte_errno;
2314 : 0 : goto exit;
2315 : : }
2316 : 0 : DRV_LOG(INFO,
2317 : : "PCI information matches MPESW device \"%s\"",
2318 : : ibv_list[ret]->name);
2319 : 0 : ibv_match[nd++] = ibv_list[ret];
2320 : 0 : break;
2321 : : }
2322 : : /* Bonding or MPESW device was not found. */
2323 [ # # ]: 0 : if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2324 : : &pci_addr))
2325 : 0 : continue;
2326 [ # # ]: 0 : if (rte_pci_addr_cmp(&owner_pci, &pci_addr) != 0)
2327 : 0 : continue;
2328 : 0 : DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2329 : : ibv_list[ret]->name);
2330 : 0 : ibv_match[nd++] = ibv_list[ret];
2331 : : }
2332 : 0 : ibv_match[nd] = NULL;
2333 [ # # ]: 0 : if (!nd) {
2334 : : /* No device matches, just complain and bail out. */
2335 : 0 : DRV_LOG(WARNING,
2336 : : "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT ","
2337 : : " are kernel drivers loaded?",
2338 : : owner_id, owner_pci.domain, owner_pci.bus,
2339 : : owner_pci.devid, owner_pci.function);
2340 : 0 : rte_errno = ENOENT;
2341 : 0 : ret = -rte_errno;
2342 : 0 : goto exit;
2343 : : }
2344 [ # # ]: 0 : if (nd == 1) {
2345 : : /*
2346 : : * Found single matching device may have multiple ports.
2347 : : * Each port may be representor, we have to check the port
2348 : : * number and check the representors existence.
2349 : : */
2350 [ # # ]: 0 : if (nl_rdma >= 0)
2351 : 0 : np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2352 [ # # ]: 0 : if (!np)
2353 : 0 : DRV_LOG(WARNING,
2354 : : "Cannot get IB device \"%s\" ports number.",
2355 : : ibv_match[0]->name);
2356 [ # # ]: 0 : if (bd >= 0 && !np) {
2357 : 0 : DRV_LOG(ERR, "Cannot get ports for bonding device.");
2358 : 0 : rte_errno = ENOENT;
2359 : 0 : ret = -rte_errno;
2360 : 0 : goto exit;
2361 : : }
2362 [ # # ]: 0 : if (mpesw >= 0 && !np) {
2363 : 0 : DRV_LOG(ERR, "Cannot get ports for MPESW device.");
2364 : 0 : rte_errno = ENOENT;
2365 : 0 : ret = -rte_errno;
2366 : 0 : goto exit;
2367 : : }
2368 : : }
2369 : : /* Now we can determine the maximal amount of devices to be spawned. */
2370 [ # # ]: 0 : list = mlx5_malloc(MLX5_MEM_ZERO,
2371 : 0 : sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2372 : : RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2373 [ # # ]: 0 : if (!list) {
2374 : 0 : DRV_LOG(ERR, "Spawn data array allocation failure.");
2375 : 0 : rte_errno = ENOMEM;
2376 : 0 : ret = -rte_errno;
2377 : 0 : goto exit;
2378 : : }
2379 [ # # # # ]: 0 : if (bd >= 0 || mpesw >= 0 || np > 1) {
2380 : : /*
2381 : : * Single IB device with multiple ports found,
2382 : : * it may be E-Switch master device and representors.
2383 : : * We have to perform identification through the ports.
2384 : : */
2385 : : MLX5_ASSERT(nl_rdma >= 0);
2386 : : MLX5_ASSERT(ns == 0);
2387 : : MLX5_ASSERT(nd == 1);
2388 : : MLX5_ASSERT(np);
2389 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2390 : 0 : list[ns].bond_info = &bond_info;
2391 : 0 : list[ns].max_port = np;
2392 : 0 : list[ns].phys_port = i;
2393 : 0 : list[ns].phys_dev_name = ibv_match[0]->name;
2394 : 0 : list[ns].eth_dev = NULL;
2395 : 0 : list[ns].pci_dev = pci_dev;
2396 : 0 : list[ns].cdev = cdev;
2397 : 0 : list[ns].pf_bond = bd;
2398 : 0 : list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2399 : 0 : list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2400 : : ibv_match[0]->name,
2401 : : i);
2402 [ # # ]: 0 : if (!list[ns].ifindex) {
2403 : : /*
2404 : : * No network interface index found for the
2405 : : * specified port, it means there is no
2406 : : * representor on this port. It's OK,
2407 : : * there can be disabled ports, for example
2408 : : * if sriov_numvfs < sriov_totalvfs.
2409 : : */
2410 : 0 : continue;
2411 : : }
2412 : 0 : ret = -1;
2413 [ # # ]: 0 : if (nl_route >= 0)
2414 : 0 : ret = mlx5_nl_switch_info(nl_route,
2415 : : list[ns].ifindex,
2416 : : &list[ns].info);
2417 [ # # # # ]: 0 : if (ret || (!list[ns].info.representor &&
2418 : : !list[ns].info.master)) {
2419 : : /*
2420 : : * We failed to recognize representors with
2421 : : * Netlink, let's try to perform the task
2422 : : * with sysfs.
2423 : : */
2424 : 0 : ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2425 : : &list[ns].info);
2426 : : }
2427 [ # # # # ]: 0 : if (!ret && bd >= 0) {
2428 [ # # # ]: 0 : switch (list[ns].info.name_type) {
2429 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2430 [ # # ]: 0 : if (np == 1) {
2431 : : /*
2432 : : * Force standalone bonding
2433 : : * device for ROCE LAG
2434 : : * configurations.
2435 : : */
2436 : 0 : list[ns].info.master = 0;
2437 : 0 : list[ns].info.representor = 0;
2438 : : }
2439 [ # # ]: 0 : if (list[ns].info.port_name == bd)
2440 : 0 : ns++;
2441 : : break;
2442 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2443 : : /* Fallthrough */
2444 : : case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2445 : : /* Fallthrough */
2446 : : case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2447 [ # # ]: 0 : if (list[ns].info.pf_num == bd)
2448 : 0 : ns++;
2449 : : break;
2450 : : default:
2451 : : break;
2452 : : }
2453 : 0 : continue;
2454 : : }
2455 [ # # # # ]: 0 : if (!ret && mpesw >= 0) {
2456 [ # # # ]: 0 : switch (list[ns].info.name_type) {
2457 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2458 : : /* Owner port is treated as master port. */
2459 [ # # ]: 0 : if (list[ns].info.port_name == mpesw) {
2460 : 0 : list[ns].info.master = 1;
2461 : 0 : list[ns].info.representor = 0;
2462 : : } else {
2463 : 0 : list[ns].info.master = 0;
2464 : 0 : list[ns].info.representor = 1;
2465 : : }
2466 : : /*
2467 : : * Ports of this type have uplink port index
2468 : : * encoded in the name. This index is also a PF index.
2469 : : */
2470 : 0 : list[ns].info.pf_num = list[ns].info.port_name;
2471 : 0 : list[ns].mpesw_port = list[ns].info.port_name;
2472 : 0 : list[ns].info.mpesw_owner = mpesw;
2473 : 0 : ns++;
2474 : 0 : break;
2475 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2476 : : case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2477 : : case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2478 : : /* Only spawn representors related to the probed PF. */
2479 [ # # ]: 0 : if (list[ns].info.pf_num == owner_id) {
2480 : : /*
2481 : : * Ports of this type have PF index encoded in name,
2482 : : * which translate to the related uplink port index.
2483 : : */
2484 : 0 : list[ns].mpesw_port = list[ns].info.pf_num;
2485 : : /* MPESW owner is also saved but not used now. */
2486 : 0 : list[ns].info.mpesw_owner = mpesw;
2487 : 0 : ns++;
2488 : : }
2489 : : break;
2490 : : default:
2491 : : break;
2492 : : }
2493 : 0 : continue;
2494 : : }
2495 [ # # ]: 0 : if (!ret && (list[ns].info.representor ^
2496 [ # # ]: 0 : list[ns].info.master))
2497 : 0 : ns++;
2498 : : }
2499 [ # # ]: 0 : if (!ns) {
2500 : 0 : DRV_LOG(ERR,
2501 : : "Unable to recognize master/representors on the IB device with multiple ports.");
2502 : 0 : rte_errno = ENOENT;
2503 : 0 : ret = -rte_errno;
2504 : 0 : goto exit;
2505 : : }
2506 : : } else {
2507 : : /*
2508 : : * The existence of several matching entries (nd > 1) means
2509 : : * port representors have been instantiated. No existing Verbs
2510 : : * call nor sysfs entries can tell them apart, this can only
2511 : : * be done through Netlink calls assuming kernel drivers are
2512 : : * recent enough to support them.
2513 : : *
2514 : : * In the event of identification failure through Netlink,
2515 : : * try again through sysfs, then:
2516 : : *
2517 : : * 1. A single IB device matches (nd == 1) with single
2518 : : * port (np=0/1) and is not a representor, assume
2519 : : * no switch support.
2520 : : *
2521 : : * 2. Otherwise no safe assumptions can be made;
2522 : : * complain louder and bail out.
2523 : : */
2524 [ # # ]: 0 : for (i = 0; i != nd; ++i) {
2525 [ # # ]: 0 : memset(&list[ns].info, 0, sizeof(list[ns].info));
2526 : 0 : list[ns].bond_info = NULL;
2527 : 0 : list[ns].max_port = 1;
2528 : 0 : list[ns].phys_port = 1;
2529 : 0 : list[ns].phys_dev_name = ibv_match[i]->name;
2530 : 0 : list[ns].eth_dev = NULL;
2531 : 0 : list[ns].pci_dev = pci_dev;
2532 : 0 : list[ns].cdev = cdev;
2533 : 0 : list[ns].pf_bond = -1;
2534 : 0 : list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2535 : 0 : list[ns].ifindex = 0;
2536 [ # # ]: 0 : if (nl_rdma >= 0)
2537 : 0 : list[ns].ifindex = mlx5_nl_ifindex
2538 : : (nl_rdma,
2539 : : ibv_match[i]->name,
2540 : : 1);
2541 [ # # ]: 0 : if (!list[ns].ifindex) {
2542 : : char ifname[IF_NAMESIZE];
2543 : :
2544 : : /*
2545 : : * Netlink failed, it may happen with old
2546 : : * ib_core kernel driver (before 4.16).
2547 : : * We can assume there is old driver because
2548 : : * here we are processing single ports IB
2549 : : * devices. Let's try sysfs to retrieve
2550 : : * the ifindex. The method works for
2551 : : * master device only.
2552 : : */
2553 [ # # ]: 0 : if (nd > 1) {
2554 : : /*
2555 : : * Multiple devices found, assume
2556 : : * representors, can not distinguish
2557 : : * master/representor and retrieve
2558 : : * ifindex via sysfs.
2559 : : */
2560 : 0 : continue;
2561 : : }
2562 : 0 : ret = mlx5_get_ifname_sysfs
2563 : 0 : (ibv_match[i]->ibdev_path, ifname);
2564 [ # # ]: 0 : if (!ret)
2565 : 0 : list[ns].ifindex =
2566 : 0 : if_nametoindex(ifname);
2567 [ # # ]: 0 : if (!list[ns].ifindex) {
2568 : : /*
2569 : : * No network interface index found
2570 : : * for the specified device, it means
2571 : : * there it is neither representor
2572 : : * nor master.
2573 : : */
2574 : 0 : continue;
2575 : : }
2576 : : }
2577 : 0 : ret = -1;
2578 [ # # ]: 0 : if (nl_route >= 0)
2579 : 0 : ret = mlx5_nl_switch_info(nl_route,
2580 : : list[ns].ifindex,
2581 : : &list[ns].info);
2582 [ # # # # ]: 0 : if (ret || (!list[ns].info.representor &&
2583 : : !list[ns].info.master)) {
2584 : : /*
2585 : : * We failed to recognize representors with
2586 : : * Netlink, let's try to perform the task
2587 : : * with sysfs.
2588 : : */
2589 : 0 : ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2590 : : &list[ns].info);
2591 : : }
2592 [ # # ]: 0 : if (!ret && (list[ns].info.representor ^
2593 [ # # ]: 0 : list[ns].info.master)) {
2594 : 0 : ns++;
2595 [ # # ]: 0 : } else if ((nd == 1) &&
2596 [ # # ]: 0 : !list[ns].info.representor &&
2597 : : !list[ns].info.master) {
2598 : : /*
2599 : : * Single IB device with one physical port and
2600 : : * attached network device.
2601 : : * May be SRIOV is not enabled or there is no
2602 : : * representors.
2603 : : */
2604 : 0 : DRV_LOG(INFO, "No E-Switch support detected.");
2605 : 0 : ns++;
2606 : 0 : break;
2607 : : }
2608 : : }
2609 [ # # ]: 0 : if (!ns) {
2610 : 0 : DRV_LOG(ERR,
2611 : : "Unable to recognize master/representors on the multiple IB devices.");
2612 : 0 : rte_errno = ENOENT;
2613 : 0 : ret = -rte_errno;
2614 : 0 : goto exit;
2615 : : }
2616 : : /*
2617 : : * New kernels may add the switch_id attribute for the case
2618 : : * there is no E-Switch and we wrongly recognized the only
2619 : : * device as master. Override this if there is the single
2620 : : * device with single port and new device name format present.
2621 : : */
2622 [ # # ]: 0 : if (nd == 1 &&
2623 [ # # ]: 0 : list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2624 : 0 : list[0].info.master = 0;
2625 : 0 : list[0].info.representor = 0;
2626 : : }
2627 : : }
2628 : : MLX5_ASSERT(ns);
2629 : : /*
2630 : : * Sort list to probe devices in natural order for users convenience
2631 : : * (i.e. master first, then representors from lowest to highest ID).
2632 : : */
2633 : 0 : qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2634 [ # # ]: 0 : if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2635 : : /* Set devargs default values. */
2636 [ # # ]: 0 : if (eth_da.nb_mh_controllers == 0) {
2637 : 0 : eth_da.nb_mh_controllers = 1;
2638 : 0 : eth_da.mh_controllers[0] = 0;
2639 : : }
2640 [ # # ]: 0 : if (eth_da.nb_ports == 0 && ns > 0) {
2641 [ # # # # ]: 0 : if (list[0].pf_bond >= 0 && list[0].info.representor)
2642 : 0 : DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2643 : : pci_dev->device.devargs->args);
2644 : 0 : eth_da.nb_ports = 1;
2645 : 0 : eth_da.ports[0] = list[0].info.pf_num;
2646 : : }
2647 [ # # ]: 0 : if (eth_da.nb_representor_ports == 0) {
2648 : 0 : eth_da.nb_representor_ports = 1;
2649 : 0 : eth_da.representor_ports[0] = 0;
2650 : : }
2651 : : }
2652 [ # # ]: 0 : for (i = 0; i != ns; ++i) {
2653 : : uint32_t restore;
2654 : :
2655 : 0 : list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da,
2656 : : mkvlist);
2657 [ # # ]: 0 : if (!list[i].eth_dev) {
2658 [ # # ]: 0 : if (rte_errno != EBUSY && rte_errno != EEXIST)
2659 : : break;
2660 : : /* Device is disabled or already spawned. Ignore it. */
2661 : 0 : continue;
2662 : : }
2663 : 0 : restore = list[i].eth_dev->data->dev_flags;
2664 : 0 : rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2665 : : /**
2666 : : * Each representor has a dedicated interrupts vector.
2667 : : * rte_eth_copy_pci_info() assigns PF interrupts handle to
2668 : : * representor eth_dev object because representor and PF
2669 : : * share the same PCI address.
2670 : : * Override representor device with a dedicated
2671 : : * interrupts handle here.
2672 : : * Representor interrupts handle is released in mlx5_dev_stop().
2673 : : */
2674 [ # # ]: 0 : if (list[i].info.representor) {
2675 : : struct rte_intr_handle *intr_handle =
2676 : 0 : rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2677 [ # # ]: 0 : if (intr_handle == NULL) {
2678 : 0 : DRV_LOG(ERR,
2679 : : "port %u failed to allocate memory for interrupt handler "
2680 : : "Rx interrupts will not be supported",
2681 : : i);
2682 : 0 : rte_errno = ENOMEM;
2683 : 0 : ret = -rte_errno;
2684 : 0 : goto exit;
2685 : : }
2686 : 0 : list[i].eth_dev->intr_handle = intr_handle;
2687 : : }
2688 : : /* Restore non-PCI flags cleared by the above call. */
2689 : 0 : list[i].eth_dev->data->dev_flags |= restore;
2690 : 0 : rte_eth_dev_probing_finish(list[i].eth_dev);
2691 : : }
2692 [ # # ]: 0 : if (i != ns) {
2693 : 0 : DRV_LOG(ERR,
2694 : : "probe of PCI device " PCI_PRI_FMT " aborted after"
2695 : : " encountering an error: %s",
2696 : : owner_pci.domain, owner_pci.bus,
2697 : : owner_pci.devid, owner_pci.function,
2698 : : strerror(rte_errno));
2699 : 0 : ret = -rte_errno;
2700 : : /* Roll back. */
2701 [ # # ]: 0 : while (i--) {
2702 [ # # ]: 0 : if (!list[i].eth_dev)
2703 : 0 : continue;
2704 : 0 : mlx5_dev_close(list[i].eth_dev);
2705 : : /* mac_addrs must not be freed because in dev_private */
2706 : 0 : list[i].eth_dev->data->mac_addrs = NULL;
2707 : 0 : claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2708 : : }
2709 : : /* Restore original error. */
2710 : 0 : rte_errno = -ret;
2711 : : } else {
2712 : 0 : ret = 0;
2713 : : }
2714 : 0 : exit:
2715 : : /*
2716 : : * Do the routine cleanup:
2717 : : * - close opened Netlink sockets
2718 : : * - free allocated spawn data array
2719 : : * - free the Infiniband device list
2720 : : */
2721 [ # # ]: 0 : if (nl_rdma >= 0)
2722 : 0 : close(nl_rdma);
2723 [ # # ]: 0 : if (nl_route >= 0)
2724 : 0 : close(nl_route);
2725 [ # # ]: 0 : if (list)
2726 : 0 : mlx5_free(list);
2727 : : MLX5_ASSERT(ibv_list);
2728 : 0 : mlx5_glue->free_device_list(ibv_list);
2729 : 0 : return ret;
2730 : : }
2731 : :
2732 : : static int
2733 : 0 : mlx5_os_parse_eth_devargs(struct rte_device *dev,
2734 : : struct rte_eth_devargs *eth_da)
2735 : : {
2736 : : int ret = 0;
2737 : :
2738 [ # # ]: 0 : if (dev->devargs == NULL)
2739 : : return 0;
2740 : : memset(eth_da, 0, sizeof(*eth_da));
2741 : : /* Parse representor information first from class argument. */
2742 [ # # ]: 0 : if (dev->devargs->cls_str)
2743 : 0 : ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da, 1);
2744 [ # # ]: 0 : if (ret < 0) {
2745 : 0 : DRV_LOG(ERR, "failed to parse device arguments: %s",
2746 : : dev->devargs->cls_str);
2747 : 0 : return -rte_errno;
2748 : : }
2749 [ # # # # ]: 0 : if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) {
2750 : : /* Parse legacy device argument */
2751 : 0 : ret = rte_eth_devargs_parse(dev->devargs->args, eth_da, 1);
2752 [ # # ]: 0 : if (ret < 0) {
2753 : 0 : DRV_LOG(ERR, "failed to parse device arguments: %s",
2754 : : dev->devargs->args);
2755 : 0 : return -rte_errno;
2756 : : }
2757 : : }
2758 : : return 0;
2759 : : }
2760 : :
2761 : : /**
2762 : : * Callback to register a PCI device.
2763 : : *
2764 : : * This function spawns Ethernet devices out of a given PCI device.
2765 : : *
2766 : : * @param[in] cdev
2767 : : * Pointer to common mlx5 device structure.
2768 : : * @param[in, out] mkvlist
2769 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2770 : : *
2771 : : * @return
2772 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2773 : : */
2774 : : static int
2775 : 0 : mlx5_os_pci_probe(struct mlx5_common_device *cdev,
2776 : : struct mlx5_kvargs_ctrl *mkvlist)
2777 : : {
2778 : 0 : struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2779 : 0 : struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2780 : : int ret = 0;
2781 : : uint16_t p;
2782 : :
2783 : 0 : ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da);
2784 [ # # ]: 0 : if (ret != 0)
2785 : : return ret;
2786 : :
2787 [ # # ]: 0 : if (eth_da.nb_ports > 0) {
2788 : : /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2789 [ # # ]: 0 : for (p = 0; p < eth_da.nb_ports; p++) {
2790 : 0 : ret = mlx5_os_pci_probe_pf(cdev, ð_da,
2791 : 0 : eth_da.ports[p], mkvlist);
2792 [ # # ]: 0 : if (ret) {
2793 : 0 : DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " "
2794 : : "aborted due to proding failure of PF %u",
2795 : : pci_dev->addr.domain, pci_dev->addr.bus,
2796 : : pci_dev->addr.devid, pci_dev->addr.function,
2797 : : eth_da.ports[p]);
2798 : 0 : mlx5_net_remove(cdev);
2799 [ # # ]: 0 : if (p != 0)
2800 : : break;
2801 : : }
2802 : : }
2803 : : } else {
2804 : 0 : ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist);
2805 : : }
2806 : : return ret;
2807 : : }
2808 : :
2809 : : /* Probe a single SF device on auxiliary bus, no representor support. */
2810 : : static int
2811 : 0 : mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,
2812 : : struct mlx5_kvargs_ctrl *mkvlist)
2813 : : {
2814 : 0 : struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2815 : 0 : struct mlx5_dev_spawn_data spawn = {
2816 : : .pf_bond = -1,
2817 : : .mpesw_port = MLX5_MPESW_PORT_INVALID,
2818 : : };
2819 : 0 : struct rte_device *dev = cdev->dev;
2820 : 0 : struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2821 : : struct rte_eth_dev *eth_dev;
2822 : : int ret = 0;
2823 : :
2824 : : /* Parse ethdev devargs. */
2825 : 0 : ret = mlx5_os_parse_eth_devargs(dev, ð_da);
2826 [ # # ]: 0 : if (ret != 0)
2827 : : return ret;
2828 : : /* Init spawn data. */
2829 : 0 : spawn.max_port = 1;
2830 : 0 : spawn.phys_port = 1;
2831 [ # # ]: 0 : spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2832 : 0 : ret = mlx5_auxiliary_get_ifindex(dev->name);
2833 [ # # ]: 0 : if (ret < 0) {
2834 : 0 : DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2835 : 0 : return ret;
2836 : : }
2837 : 0 : spawn.ifindex = ret;
2838 : 0 : spawn.cdev = cdev;
2839 : : /* Spawn device. */
2840 : 0 : eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist);
2841 [ # # ]: 0 : if (eth_dev == NULL)
2842 : 0 : return -rte_errno;
2843 : : /* Post create. */
2844 : 0 : eth_dev->intr_handle = adev->intr_handle;
2845 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2846 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2847 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2848 : 0 : eth_dev->data->numa_node = dev->numa_node;
2849 : : }
2850 : 0 : rte_eth_dev_probing_finish(eth_dev);
2851 : 0 : return 0;
2852 : : }
2853 : :
2854 : : /**
2855 : : * Net class driver callback to probe a device.
2856 : : *
2857 : : * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2858 : : *
2859 : : * @param[in] cdev
2860 : : * Pointer to the common mlx5 device.
2861 : : * @param[in, out] mkvlist
2862 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2863 : : *
2864 : : * @return
2865 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2866 : : */
2867 : : int
2868 : 0 : mlx5_os_net_probe(struct mlx5_common_device *cdev,
2869 : : struct mlx5_kvargs_ctrl *mkvlist)
2870 : : {
2871 : : int ret;
2872 : :
2873 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2874 : 0 : mlx5_pmd_socket_init();
2875 : 0 : ret = mlx5_init_once();
2876 [ # # ]: 0 : if (ret) {
2877 : 0 : DRV_LOG(ERR, "Unable to init PMD global data: %s",
2878 : : strerror(rte_errno));
2879 : 0 : return -rte_errno;
2880 : : }
2881 : 0 : ret = mlx5_probe_again_args_validate(cdev, mkvlist);
2882 [ # # ]: 0 : if (ret) {
2883 : 0 : DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
2884 : : strerror(rte_errno));
2885 : 0 : return -rte_errno;
2886 : : }
2887 [ # # ]: 0 : if (mlx5_dev_is_pci(cdev->dev))
2888 : 0 : return mlx5_os_pci_probe(cdev, mkvlist);
2889 : : else
2890 : 0 : return mlx5_os_auxiliary_probe(cdev, mkvlist);
2891 : : }
2892 : :
2893 : : /**
2894 : : * Cleanup resources when the last device is closed.
2895 : : */
2896 : : void
2897 : 0 : mlx5_os_net_cleanup(void)
2898 : : {
2899 : 0 : mlx5_pmd_socket_uninit();
2900 : 0 : }
2901 : :
2902 : : /**
2903 : : * Install shared asynchronous device events handler.
2904 : : * This function is implemented to support event sharing
2905 : : * between multiple ports of single IB device.
2906 : : *
2907 : : * @param sh
2908 : : * Pointer to mlx5_dev_ctx_shared object.
2909 : : */
2910 : : void
2911 : 0 : mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2912 : : {
2913 : 0 : struct ibv_context *ctx = sh->cdev->ctx;
2914 : : int nlsk_fd;
2915 : :
2916 : 0 : sh->intr_handle = mlx5_os_interrupt_handler_create
2917 : : (RTE_INTR_INSTANCE_F_SHARED, true,
2918 : : ctx->async_fd, mlx5_dev_interrupt_handler, sh);
2919 [ # # ]: 0 : if (!sh->intr_handle) {
2920 : 0 : DRV_LOG(ERR, "Failed to allocate intr_handle.");
2921 : 0 : return;
2922 : : }
2923 : 0 : nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK);
2924 [ # # ]: 0 : if (nlsk_fd < 0) {
2925 : 0 : DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s",
2926 : : rte_strerror(rte_errno));
2927 : 0 : return;
2928 : : }
2929 : 0 : sh->intr_handle_nl = mlx5_os_interrupt_handler_create
2930 : : (RTE_INTR_INSTANCE_F_SHARED, true,
2931 : : nlsk_fd, mlx5_dev_interrupt_handler_nl, sh);
2932 [ # # ]: 0 : if (sh->intr_handle_nl == NULL) {
2933 : 0 : DRV_LOG(ERR, "Fail to allocate intr_handle");
2934 : 0 : return;
2935 : : }
2936 [ # # ]: 0 : if (sh->cdev->config.devx) {
2937 : : #ifdef HAVE_IBV_DEVX_ASYNC
2938 : : struct mlx5dv_devx_cmd_comp *devx_comp;
2939 : :
2940 : 0 : sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2941 : : devx_comp = sh->devx_comp;
2942 [ # # ]: 0 : if (!devx_comp) {
2943 : 0 : DRV_LOG(INFO, "failed to allocate devx_comp.");
2944 : 0 : return;
2945 : : }
2946 : 0 : sh->intr_handle_devx = mlx5_os_interrupt_handler_create
2947 : : (RTE_INTR_INSTANCE_F_SHARED, true,
2948 : : devx_comp->fd,
2949 : : mlx5_dev_interrupt_handler_devx, sh);
2950 [ # # ]: 0 : if (!sh->intr_handle_devx) {
2951 : 0 : DRV_LOG(ERR, "Failed to allocate intr_handle.");
2952 : 0 : return;
2953 : : }
2954 : : #endif /* HAVE_IBV_DEVX_ASYNC */
2955 : : }
2956 : : }
2957 : :
2958 : : /**
2959 : : * Uninstall shared asynchronous device events handler.
2960 : : * This function is implemented to support event sharing
2961 : : * between multiple ports of single IB device.
2962 : : *
2963 : : * @param dev
2964 : : * Pointer to mlx5_dev_ctx_shared object.
2965 : : */
2966 : : void
2967 : 0 : mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2968 : : {
2969 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle,
2970 : : mlx5_dev_interrupt_handler, sh);
2971 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl,
2972 : : mlx5_dev_interrupt_handler_nl, sh);
2973 : : #ifdef HAVE_IBV_DEVX_ASYNC
2974 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx,
2975 : : mlx5_dev_interrupt_handler_devx, sh);
2976 [ # # ]: 0 : if (sh->devx_comp)
2977 : 0 : mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2978 : : #endif
2979 : 0 : }
2980 : :
2981 : : /**
2982 : : * Read statistics by a named counter.
2983 : : *
2984 : : * @param[in] priv
2985 : : * Pointer to the private device data structure.
2986 : : * @param[in] ctr_name
2987 : : * Pointer to the name of the statistic counter to read
2988 : : * @param[out] stat
2989 : : * Pointer to read statistic value.
2990 : : * @return
2991 : : * 0 on success and stat is valud, 1 if failed to read the value
2992 : : * rte_errno is set.
2993 : : *
2994 : : */
2995 : : int
2996 : 0 : mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2997 : : uint64_t *stat)
2998 : : {
2999 : : int fd;
3000 : :
3001 [ # # ]: 0 : if (priv->sh) {
3002 [ # # ]: 0 : if (priv->q_counters != NULL &&
3003 [ # # ]: 0 : strcmp(ctr_name, "out_of_buffer") == 0) {
3004 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
3005 : 0 : DRV_LOG(WARNING, "Devx out_of_buffer counter is not supported in the secondary process");
3006 : 0 : rte_errno = ENOTSUP;
3007 : 0 : return 1;
3008 : : }
3009 : 0 : return mlx5_devx_cmd_queue_counter_query
3010 : : (priv->q_counters, 0, (uint32_t *)stat);
3011 : : }
3012 : 0 : MKSTR(path, "%s/ports/%d/hw_counters/%s",
3013 : : priv->sh->ibdev_path,
3014 : : priv->dev_port,
3015 : : ctr_name);
3016 : : fd = open(path, O_RDONLY);
3017 : : /*
3018 : : * in switchdev the file location is not per port
3019 : : * but rather in <ibdev_path>/hw_counters/<file_name>.
3020 : : */
3021 [ # # ]: 0 : if (fd == -1) {
3022 : 0 : MKSTR(path1, "%s/hw_counters/%s",
3023 : : priv->sh->ibdev_path,
3024 : : ctr_name);
3025 : : fd = open(path1, O_RDONLY);
3026 : : }
3027 [ # # ]: 0 : if (fd != -1) {
3028 : 0 : char buf[21] = {'\0'};
3029 : : ssize_t n = read(fd, buf, sizeof(buf));
3030 : :
3031 : 0 : close(fd);
3032 [ # # ]: 0 : if (n != -1) {
3033 : 0 : *stat = strtoull(buf, NULL, 10);
3034 : 0 : return 0;
3035 : : }
3036 : : }
3037 : : }
3038 : 0 : *stat = 0;
3039 : 0 : return 1;
3040 : : }
3041 : :
3042 : : /**
3043 : : * Remove a MAC address from device
3044 : : *
3045 : : * @param dev
3046 : : * Pointer to Ethernet device structure.
3047 : : * @param index
3048 : : * MAC address index.
3049 : : */
3050 : : void
3051 : 0 : mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3052 : : {
3053 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3054 : 0 : const int vf = priv->sh->dev_cap.vf;
3055 : :
3056 [ # # ]: 0 : if (vf)
3057 : 0 : mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3058 : 0 : mlx5_ifindex(dev), priv->mac_own,
3059 : 0 : &dev->data->mac_addrs[index], index);
3060 : 0 : }
3061 : :
3062 : : /**
3063 : : * Adds a MAC address to the device
3064 : : *
3065 : : * @param dev
3066 : : * Pointer to Ethernet device structure.
3067 : : * @param mac_addr
3068 : : * MAC address to register.
3069 : : * @param index
3070 : : * MAC address index.
3071 : : *
3072 : : * @return
3073 : : * 0 on success, a negative errno value otherwise
3074 : : */
3075 : : int
3076 : 0 : mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3077 : : uint32_t index)
3078 : : {
3079 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3080 : 0 : const int vf = priv->sh->dev_cap.vf;
3081 : : int ret = 0;
3082 : :
3083 [ # # ]: 0 : if (vf)
3084 : 0 : ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3085 : 0 : mlx5_ifindex(dev), priv->mac_own,
3086 : : mac, index);
3087 : 0 : return ret;
3088 : : }
3089 : :
3090 : : /**
3091 : : * Modify a VF MAC address
3092 : : *
3093 : : * @param priv
3094 : : * Pointer to device private data.
3095 : : * @param mac_addr
3096 : : * MAC address to modify into.
3097 : : * @param iface_idx
3098 : : * Net device interface index
3099 : : * @param vf_index
3100 : : * VF index
3101 : : *
3102 : : * @return
3103 : : * 0 on success, a negative errno value otherwise
3104 : : */
3105 : : int
3106 : 0 : mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3107 : : unsigned int iface_idx,
3108 : : struct rte_ether_addr *mac_addr,
3109 : : int vf_index)
3110 : : {
3111 : 0 : return mlx5_nl_vf_mac_addr_modify
3112 : : (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3113 : : }
3114 : :
3115 : : /**
3116 : : * Set device promiscuous mode
3117 : : *
3118 : : * @param dev
3119 : : * Pointer to Ethernet device structure.
3120 : : * @param enable
3121 : : * 0 - promiscuous is disabled, otherwise - enabled
3122 : : *
3123 : : * @return
3124 : : * 0 on success, a negative error value otherwise
3125 : : */
3126 : : int
3127 : 0 : mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
3128 : : {
3129 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3130 : :
3131 : 0 : return mlx5_nl_promisc(priv->nl_socket_route,
3132 : : mlx5_ifindex(dev), !!enable);
3133 : : }
3134 : :
3135 : : /**
3136 : : * Set device promiscuous mode
3137 : : *
3138 : : * @param dev
3139 : : * Pointer to Ethernet device structure.
3140 : : * @param enable
3141 : : * 0 - all multicase is disabled, otherwise - enabled
3142 : : *
3143 : : * @return
3144 : : * 0 on success, a negative error value otherwise
3145 : : */
3146 : : int
3147 : 0 : mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
3148 : : {
3149 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3150 : :
3151 : 0 : return mlx5_nl_allmulti(priv->nl_socket_route,
3152 : : mlx5_ifindex(dev), !!enable);
3153 : : }
3154 : :
3155 : : /**
3156 : : * Flush device MAC addresses
3157 : : *
3158 : : * @param dev
3159 : : * Pointer to Ethernet device structure.
3160 : : *
3161 : : */
3162 : : void
3163 : 0 : mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3164 : : {
3165 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3166 : :
3167 : 0 : mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3168 : : dev->data->mac_addrs,
3169 : 0 : MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3170 : 0 : }
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