Branch data Line data Source code
1 : : /* SPDX-License-Identifier: BSD-3-Clause
2 : : * Copyright 2015 6WIND S.A.
3 : : * Copyright 2020 Mellanox Technologies, Ltd
4 : : */
5 : :
6 : : #include <stddef.h>
7 : : #include <unistd.h>
8 : : #include <string.h>
9 : : #include <stdint.h>
10 : : #include <stdlib.h>
11 : : #include <errno.h>
12 : : #include <net/if.h>
13 : : #include <linux/rtnetlink.h>
14 : : #include <linux/sockios.h>
15 : : #include <linux/ethtool.h>
16 : : #include <fcntl.h>
17 : :
18 : : #include <rte_malloc.h>
19 : : #include <ethdev_driver.h>
20 : : #include <ethdev_pci.h>
21 : : #include <rte_pci.h>
22 : : #include <bus_driver.h>
23 : : #include <bus_pci_driver.h>
24 : : #include <bus_auxiliary_driver.h>
25 : : #include <rte_common.h>
26 : : #include <rte_kvargs.h>
27 : : #include <rte_rwlock.h>
28 : : #include <rte_spinlock.h>
29 : : #include <rte_string_fns.h>
30 : : #include <rte_alarm.h>
31 : : #include <rte_eal_paging.h>
32 : :
33 : : #include <mlx5_glue.h>
34 : : #include <mlx5_devx_cmds.h>
35 : : #include <mlx5_common.h>
36 : : #include <mlx5_common_mp.h>
37 : : #include <mlx5_common_mr.h>
38 : : #include <mlx5_malloc.h>
39 : :
40 : : #include "mlx5_defs.h"
41 : : #include "mlx5.h"
42 : : #include "mlx5_common_os.h"
43 : : #include "mlx5_utils.h"
44 : : #include "mlx5_rxtx.h"
45 : : #include "mlx5_rx.h"
46 : : #include "mlx5_tx.h"
47 : : #include "mlx5_autoconf.h"
48 : : #include "mlx5_flow.h"
49 : : #include "rte_pmd_mlx5.h"
50 : : #include "mlx5_verbs.h"
51 : : #include "mlx5_nl.h"
52 : : #include "mlx5_devx.h"
53 : :
54 : : #ifndef HAVE_IBV_MLX5_MOD_MPW
55 : : #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
56 : : #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
57 : : #endif
58 : :
59 : : #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
60 : : #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
61 : : #endif
62 : :
63 : : static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 : :
65 : : /* Spinlock for mlx5_shared_data allocation. */
66 : : static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 : :
68 : : /* Process local data for secondary processes. */
69 : : static struct mlx5_local_data mlx5_local_data;
70 : :
71 : : /* rte flow indexed pool configuration. */
72 : : static const struct mlx5_indexed_pool_config default_icfg[] = {
73 : : {
74 : : .size = sizeof(struct rte_flow),
75 : : .trunk_size = 64,
76 : : .need_lock = 1,
77 : : .release_mem_en = 0,
78 : : .malloc = mlx5_malloc,
79 : : .free = mlx5_free,
80 : : .per_core_cache = 0,
81 : : .type = "ctl_flow_ipool",
82 : : },
83 : : {
84 : : .size = sizeof(struct rte_flow),
85 : : .trunk_size = 64,
86 : : .grow_trunk = 3,
87 : : .grow_shift = 2,
88 : : .need_lock = 1,
89 : : .release_mem_en = 0,
90 : : .malloc = mlx5_malloc,
91 : : .free = mlx5_free,
92 : : .per_core_cache = 1 << 14,
93 : : .type = "rte_flow_ipool",
94 : : },
95 : : {
96 : : .size = sizeof(struct rte_flow),
97 : : .trunk_size = 64,
98 : : .grow_trunk = 3,
99 : : .grow_shift = 2,
100 : : .need_lock = 1,
101 : : .release_mem_en = 0,
102 : : .malloc = mlx5_malloc,
103 : : .free = mlx5_free,
104 : : .per_core_cache = 0,
105 : : .type = "mcp_flow_ipool",
106 : : },
107 : : };
108 : :
109 : : /**
110 : : * Set the completion channel file descriptor interrupt as non-blocking.
111 : : *
112 : : * @param[in] rxq_obj
113 : : * Pointer to RQ channel object, which includes the channel fd
114 : : *
115 : : * @param[out] fd
116 : : * The file descriptor (representing the interrupt) used in this channel.
117 : : *
118 : : * @return
119 : : * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
120 : : */
121 : : int
122 : 0 : mlx5_os_set_nonblock_channel_fd(int fd)
123 : : {
124 : : int flags;
125 : :
126 : 0 : flags = fcntl(fd, F_GETFL);
127 : 0 : return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
128 : : }
129 : :
130 : : /**
131 : : * Get mlx5 device attributes. The glue function query_device_ex() is called
132 : : * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
133 : : * device attributes from the glue out parameter.
134 : : *
135 : : * @param sh
136 : : * Pointer to shared device context.
137 : : *
138 : : * @return
139 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
140 : : */
141 : : int
142 : 0 : mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
143 : : {
144 : : int err;
145 : 0 : struct mlx5_common_device *cdev = sh->cdev;
146 : 0 : struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
147 : 0 : struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
148 : 0 : struct mlx5dv_context dv_attr = { .comp_mask = 0 };
149 : :
150 : 0 : err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
151 [ # # ]: 0 : if (err) {
152 : 0 : rte_errno = errno;
153 : 0 : return -rte_errno;
154 : : }
155 : : #ifdef HAVE_IBV_MLX5_MOD_SWP
156 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
157 : : #endif
158 : : #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
159 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
160 : : #endif
161 : : #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
162 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
163 : : #endif
164 : : #ifdef HAVE_IBV_DEVICE_ATTR_ESW_MGR_REG_C0
165 : : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_REG_C0;
166 : : #endif
167 : 0 : err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
168 [ # # ]: 0 : if (err) {
169 : 0 : rte_errno = errno;
170 : 0 : return -rte_errno;
171 : : }
172 : 0 : memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
173 [ # # ]: 0 : if (mlx5_dev_is_pci(cdev->dev))
174 : 0 : sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_BUS_DEVICE(cdev->dev,
175 : : struct rte_pci_device));
176 : : else
177 : 0 : sh->dev_cap.sf = 1;
178 : 0 : sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
179 : 0 : sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
180 : 0 : sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
181 : 0 : sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
182 : : #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
183 : 0 : sh->dev_cap.dest_tir = 1;
184 : : #endif
185 : : #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
186 : 0 : DRV_LOG(DEBUG, "DV flow is supported.");
187 : 0 : sh->dev_cap.dv_flow_en = 1;
188 : : #endif
189 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
190 [ # # # # ]: 0 : if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
191 : 0 : sh->dev_cap.dv_esw_en = 1;
192 : : #endif
193 : : /*
194 : : * Multi-packet send is supported by ConnectX-4 Lx PF as well
195 : : * as all ConnectX-5 devices.
196 : : */
197 [ # # ]: 0 : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
198 [ # # ]: 0 : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
199 : 0 : DRV_LOG(DEBUG, "Enhanced MPW is supported.");
200 : 0 : sh->dev_cap.mps = MLX5_MPW_ENHANCED;
201 : : } else {
202 : 0 : DRV_LOG(DEBUG, "MPW is supported.");
203 : 0 : sh->dev_cap.mps = MLX5_MPW;
204 : : }
205 : : } else {
206 : 0 : DRV_LOG(DEBUG, "MPW isn't supported.");
207 : 0 : sh->dev_cap.mps = MLX5_MPW_DISABLED;
208 : : }
209 : : #if (RTE_CACHE_LINE_SIZE == 128)
210 : : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
211 : : sh->dev_cap.cqe_comp = 1;
212 : : DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
213 : : sh->dev_cap.cqe_comp ? "" : "not ");
214 : : #else
215 : 0 : sh->dev_cap.cqe_comp = 1;
216 : : #endif
217 : : #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
218 : 0 : sh->dev_cap.mpls_en =
219 : : ((dv_attr.tunnel_offloads_caps &
220 : 0 : MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
221 : : (dv_attr.tunnel_offloads_caps &
222 : : MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
223 [ # # ]: 0 : DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
224 : : sh->dev_cap.mpls_en ? "" : "not ");
225 : : #else
226 : : DRV_LOG(WARNING,
227 : : "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
228 : : #endif
229 : : #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
230 : : sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
231 : : #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
232 : 0 : sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
233 : : IBV_DEVICE_PCI_WRITE_END_PADDING);
234 : : #endif
235 : 0 : sh->dev_cap.hw_csum =
236 : 0 : !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
237 [ # # ]: 0 : DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
238 : : sh->dev_cap.hw_csum ? "" : "not ");
239 : 0 : sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
240 : : IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
241 [ # # ]: 0 : DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
242 : : (sh->dev_cap.hw_vlan_strip ? "" : "not "));
243 : 0 : sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
244 : : IBV_RAW_PACKET_CAP_SCATTER_FCS);
245 : : #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
246 : : !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
247 : : DRV_LOG(DEBUG, "Counters are not supported.");
248 : : #endif
249 : : /*
250 : : * DPDK doesn't support larger/variable indirection tables.
251 : : * Once DPDK supports it, take max size from device attr.
252 : : */
253 : 0 : sh->dev_cap.ind_table_max_size =
254 : 0 : RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
255 : : (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
256 : 0 : DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
257 : : sh->dev_cap.ind_table_max_size);
258 [ # # ]: 0 : sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
259 [ # # ]: 0 : (attr_ex.tso_caps.supported_qpts &
260 : : (1 << IBV_QPT_RAW_PACKET)));
261 [ # # ]: 0 : if (sh->dev_cap.tso)
262 : 0 : sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
263 [ # # ]: 0 : strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
264 : : sizeof(sh->dev_cap.fw_ver));
265 : : #ifdef HAVE_IBV_MLX5_MOD_SWP
266 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
267 : 0 : sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
268 : : (MLX5_SW_PARSING_CAP |
269 : : MLX5_SW_PARSING_CSUM_CAP |
270 : : MLX5_SW_PARSING_TSO_CAP);
271 : 0 : DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
272 : : #endif
273 : : #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
274 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
275 : : struct mlx5dv_striding_rq_caps *strd_rq_caps =
276 : : &dv_attr.striding_rq_caps;
277 : :
278 : 0 : sh->dev_cap.mprq.enabled = 1;
279 : 0 : sh->dev_cap.mprq.log_min_stride_size =
280 : 0 : strd_rq_caps->min_single_stride_log_num_of_bytes;
281 : 0 : sh->dev_cap.mprq.log_max_stride_size =
282 : 0 : strd_rq_caps->max_single_stride_log_num_of_bytes;
283 : 0 : sh->dev_cap.mprq.log_min_stride_num =
284 : 0 : strd_rq_caps->min_single_wqe_log_num_of_strides;
285 : 0 : sh->dev_cap.mprq.log_max_stride_num =
286 : 0 : strd_rq_caps->max_single_wqe_log_num_of_strides;
287 : 0 : sh->dev_cap.mprq.log_min_stride_wqe_size =
288 : 0 : cdev->config.devx ?
289 [ # # ]: 0 : hca_attr->log_min_stride_wqe_sz :
290 : : MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
291 : 0 : DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
292 : : sh->dev_cap.mprq.log_min_stride_size);
293 : 0 : DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
294 : : sh->dev_cap.mprq.log_max_stride_size);
295 : 0 : DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
296 : : sh->dev_cap.mprq.log_min_stride_num);
297 : 0 : DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
298 : : sh->dev_cap.mprq.log_max_stride_num);
299 : 0 : DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
300 : : sh->dev_cap.mprq.log_min_stride_wqe_size);
301 : 0 : DRV_LOG(DEBUG, "\tsupported_qpts: %d",
302 : : strd_rq_caps->supported_qpts);
303 : 0 : DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
304 : : }
305 : : #endif
306 : : #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
307 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
308 : 0 : sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
309 : : (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
310 : : MLX5_TUNNELED_OFFLOADS_GRE_CAP |
311 : : MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
312 : : }
313 [ # # ]: 0 : if (sh->dev_cap.tunnel_en) {
314 [ # # # # : 0 : DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
# # ]
315 : : sh->dev_cap.tunnel_en &
316 : : MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
317 : : sh->dev_cap.tunnel_en &
318 : : MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
319 : : sh->dev_cap.tunnel_en &
320 : : MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
321 : : } else {
322 : 0 : DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
323 : : }
324 : : #else
325 : : DRV_LOG(WARNING,
326 : : "Tunnel offloading disabled due to old OFED/rdma-core version");
327 : : #endif
328 [ # # ]: 0 : if (!sh->cdev->config.devx)
329 : : return 0;
330 : : /* Check capabilities for Packet Pacing. */
331 : 0 : DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
332 : : hca_attr->dev_freq_khz);
333 [ # # ]: 0 : DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
334 : : hca_attr->qos.packet_pacing ? "" : "not ");
335 [ # # ]: 0 : DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
336 : : hca_attr->cross_channel ? "" : "not ");
337 [ # # ]: 0 : DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
338 : : hca_attr->wqe_index_ignore ? "" : "not ");
339 [ # # ]: 0 : DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
340 : : hca_attr->non_wire_sq ? "" : "not ");
341 [ # # ]: 0 : DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
342 : : hca_attr->log_max_static_sq_wq ? "" : "not ",
343 : : hca_attr->log_max_static_sq_wq);
344 [ # # ]: 0 : DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
345 : : hca_attr->qos.wqe_rate_pp ? "" : "not ");
346 : 0 : sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
347 [ # # ]: 0 : if (!hca_attr->cross_channel) {
348 : 0 : DRV_LOG(DEBUG,
349 : : "Cross channel operations are required for packet pacing.");
350 : 0 : sh->dev_cap.txpp_en = 0;
351 : : }
352 [ # # ]: 0 : if (!hca_attr->wqe_index_ignore) {
353 : 0 : DRV_LOG(DEBUG,
354 : : "WQE index ignore feature is required for packet pacing.");
355 : 0 : sh->dev_cap.txpp_en = 0;
356 : : }
357 [ # # ]: 0 : if (!hca_attr->non_wire_sq) {
358 : 0 : DRV_LOG(DEBUG,
359 : : "Non-wire SQ feature is required for packet pacing.");
360 : 0 : sh->dev_cap.txpp_en = 0;
361 : : }
362 [ # # ]: 0 : if (!hca_attr->log_max_static_sq_wq) {
363 : 0 : DRV_LOG(DEBUG,
364 : : "Static WQE SQ feature is required for packet pacing.");
365 : 0 : sh->dev_cap.txpp_en = 0;
366 : : }
367 [ # # ]: 0 : if (!hca_attr->qos.wqe_rate_pp) {
368 : 0 : DRV_LOG(DEBUG,
369 : : "WQE rate mode is required for packet pacing.");
370 : 0 : sh->dev_cap.txpp_en = 0;
371 : : }
372 : : #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
373 : : DRV_LOG(DEBUG,
374 : : "DevX does not provide UAR offset, can't create queues for packet pacing.");
375 : : sh->dev_cap.txpp_en = 0;
376 : : #endif
377 : 0 : sh->dev_cap.scatter_fcs_w_decap_disable =
378 : 0 : hca_attr->scatter_fcs_w_decap_disable;
379 : 0 : sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
380 : 0 : mlx5_rt_timestamp_config(sh, hca_attr);
381 : 0 : sh->dev_cap.esw_info.vhca_id = hca_attr->vhca_id;
382 : : #ifdef HAVE_IBV_DEVICE_ATTR_ESW_MGR_REG_C0
383 : : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_REG_C0) {
384 : : sh->dev_cap.esw_info.regc_value = dv_attr.reg_c0.value;
385 : : sh->dev_cap.esw_info.regc_mask = dv_attr.reg_c0.mask;
386 : : }
387 : : #else
388 : 0 : sh->dev_cap.esw_info.regc_value = 0;
389 : 0 : sh->dev_cap.esw_info.regc_mask = 0;
390 : : #endif
391 : 0 : sh->dev_cap.esw_info.is_set = 1;
392 : 0 : return 0;
393 : : }
394 : :
395 : : /**
396 : : * Detect misc5 support or not
397 : : *
398 : : * @param[in] priv
399 : : * Device private data pointer
400 : : */
401 : : #ifdef HAVE_MLX5DV_DR
402 : : static void
403 : 0 : __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
404 : : {
405 : : #ifdef HAVE_IBV_FLOW_DV_SUPPORT
406 : : /* Dummy VxLAN matcher to detect rdma-core misc5 cap
407 : : * Case: IPv4--->UDP--->VxLAN--->vni
408 : : */
409 : : void *tbl;
410 : : struct mlx5_flow_dv_match_params matcher_mask;
411 : : void *match_m;
412 : : void *matcher;
413 : : void *headers_m;
414 : : void *misc5_m;
415 : : uint32_t *tunnel_header_m;
416 : : struct mlx5dv_flow_matcher_attr dv_attr;
417 : :
418 : : memset(&matcher_mask, 0, sizeof(matcher_mask));
419 : 0 : matcher_mask.size = sizeof(matcher_mask.buf);
420 : : match_m = matcher_mask.buf;
421 : : headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
422 : : misc5_m = MLX5_ADDR_OF(fte_match_param,
423 : : match_m, misc_parameters_5);
424 : : tunnel_header_m = (uint32_t *)
425 : : MLX5_ADDR_OF(fte_match_set_misc5,
426 : : misc5_m, tunnel_header_1);
427 : : MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
428 [ # # ]: 0 : MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
429 : 0 : MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
430 : 0 : *tunnel_header_m = 0xffffff;
431 : :
432 : 0 : tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
433 [ # # ]: 0 : if (!tbl) {
434 : 0 : DRV_LOG(INFO, "No SW steering support");
435 : 0 : return;
436 : : }
437 : 0 : dv_attr.type = IBV_FLOW_ATTR_NORMAL;
438 : 0 : dv_attr.match_mask = (void *)&matcher_mask;
439 : 0 : dv_attr.match_criteria_enable =
440 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
441 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
442 : 0 : dv_attr.priority = 3;
443 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
444 : : void *misc2_m;
445 [ # # ]: 0 : if (priv->sh->config.dv_esw_en) {
446 : : /* FDB enabled reg_c_0 */
447 : 0 : dv_attr.match_criteria_enable |=
448 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
449 : : misc2_m = MLX5_ADDR_OF(fte_match_param,
450 : : match_m, misc_parameters_2);
451 [ # # ]: 0 : MLX5_SET(fte_match_set_misc2, misc2_m,
452 : : metadata_reg_c_0, 0xffff);
453 : : }
454 : : #endif
455 : 0 : matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
456 : : &dv_attr, tbl);
457 [ # # ]: 0 : if (matcher) {
458 : 0 : priv->sh->misc5_cap = 1;
459 : 0 : mlx5_glue->dv_destroy_flow_matcher(matcher);
460 : : }
461 : 0 : mlx5_glue->dr_destroy_flow_tbl(tbl);
462 : : #else
463 : : RTE_SET_USED(priv);
464 : : #endif
465 : : }
466 : : #endif
467 : :
468 : : /**
469 : : * Initialize DR related data within private structure.
470 : : * Routine checks the reference counter and does actual
471 : : * resources creation/initialization only if counter is zero.
472 : : *
473 : : * @param[in] eth_dev
474 : : * Pointer to the device.
475 : : *
476 : : * @return
477 : : * Zero on success, positive error code otherwise.
478 : : */
479 : : static int
480 : 0 : mlx5_alloc_shared_dr(struct rte_eth_dev *eth_dev)
481 : : {
482 : 0 : struct mlx5_priv *priv = eth_dev->data->dev_private;
483 : 0 : struct mlx5_dev_ctx_shared *sh = priv->sh;
484 : : char s[MLX5_NAME_SIZE] __rte_unused;
485 : : int err;
486 : :
487 : : MLX5_ASSERT(sh && sh->refcnt);
488 [ # # ]: 0 : if (sh->refcnt > 1)
489 : : return 0;
490 : 0 : err = mlx5_alloc_table_hash_list(priv);
491 [ # # ]: 0 : if (err)
492 : 0 : goto error;
493 : 0 : sh->default_miss_action =
494 : 0 : mlx5_glue->dr_create_flow_action_default_miss();
495 [ # # ]: 0 : if (!sh->default_miss_action)
496 : 0 : DRV_LOG(WARNING, "Default miss action is not supported.");
497 : : /* The resources below are only valid with DV support. */
498 : : #ifdef HAVE_IBV_FLOW_DV_SUPPORT
499 : : /* Init shared flex parsers list, no need lcore_share */
500 : 0 : snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
501 : 0 : sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
502 : : mlx5_flex_parser_create_cb,
503 : : mlx5_flex_parser_match_cb,
504 : : mlx5_flex_parser_remove_cb,
505 : : mlx5_flex_parser_clone_cb,
506 : : mlx5_flex_parser_clone_free_cb);
507 [ # # ]: 0 : if (!sh->flex_parsers_dv)
508 : 0 : goto error;
509 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2) {
510 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
511 [ # # ]: 0 : sh->dv_regc0_mask) {
512 : : /* Reuse DV callback functions. */
513 : 0 : sh->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
514 : : MLX5_FLOW_MREG_HTABLE_SZ,
515 : : false, true, eth_dev,
516 : : mlx5_flow_nta_mreg_create_cb,
517 : : mlx5_flow_dv_mreg_match_cb,
518 : : mlx5_flow_nta_mreg_remove_cb,
519 : : mlx5_flow_dv_mreg_clone_cb,
520 : : mlx5_flow_dv_mreg_clone_free_cb);
521 [ # # ]: 0 : if (!sh->mreg_cp_tbl) {
522 : : err = ENOMEM;
523 : 0 : goto error;
524 : : }
525 : : }
526 : 0 : return 0;
527 : : }
528 : : /* Init port id action list. */
529 : : snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
530 : 0 : sh->port_id_action_list = mlx5_list_create(s, sh, true,
531 : : mlx5_flow_dv_port_id_create_cb,
532 : : mlx5_flow_dv_port_id_match_cb,
533 : : mlx5_flow_dv_port_id_remove_cb,
534 : : mlx5_flow_dv_port_id_clone_cb,
535 : : mlx5_flow_dv_port_id_clone_free_cb);
536 [ # # ]: 0 : if (!sh->port_id_action_list)
537 : 0 : goto error;
538 : : /* Init push vlan action list. */
539 : : snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
540 : 0 : sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
541 : : mlx5_flow_dv_push_vlan_create_cb,
542 : : mlx5_flow_dv_push_vlan_match_cb,
543 : : mlx5_flow_dv_push_vlan_remove_cb,
544 : : mlx5_flow_dv_push_vlan_clone_cb,
545 : : mlx5_flow_dv_push_vlan_clone_free_cb);
546 [ # # ]: 0 : if (!sh->push_vlan_action_list)
547 : 0 : goto error;
548 : : /* Init sample action list. */
549 : : snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
550 : 0 : sh->sample_action_list = mlx5_list_create(s, sh, true,
551 : : mlx5_flow_dv_sample_create_cb,
552 : : mlx5_flow_dv_sample_match_cb,
553 : : mlx5_flow_dv_sample_remove_cb,
554 : : mlx5_flow_dv_sample_clone_cb,
555 : : mlx5_flow_dv_sample_clone_free_cb);
556 [ # # ]: 0 : if (!sh->sample_action_list)
557 : 0 : goto error;
558 : : /* Init dest array action list. */
559 : : snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
560 : 0 : sh->dest_array_list = mlx5_list_create(s, sh, true,
561 : : mlx5_flow_dv_dest_array_create_cb,
562 : : mlx5_flow_dv_dest_array_match_cb,
563 : : mlx5_flow_dv_dest_array_remove_cb,
564 : : mlx5_flow_dv_dest_array_clone_cb,
565 : : mlx5_flow_dv_dest_array_clone_free_cb);
566 [ # # ]: 0 : if (!sh->dest_array_list)
567 : 0 : goto error;
568 : : #else
569 : : if (priv->sh->config.dv_flow_en == 2)
570 : : return 0;
571 : : #endif
572 : : #ifdef HAVE_MLX5DV_DR
573 : : void *domain;
574 : :
575 : : /* Reference counter is zero, we should initialize structures. */
576 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
577 : : MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
578 [ # # ]: 0 : if (!domain) {
579 : 0 : DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
580 : 0 : err = errno;
581 : 0 : goto error;
582 : : }
583 : 0 : sh->rx_domain = domain;
584 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
585 : : MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
586 [ # # ]: 0 : if (!domain) {
587 : 0 : DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
588 : 0 : err = errno;
589 : 0 : goto error;
590 : : }
591 : 0 : sh->tx_domain = domain;
592 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
593 [ # # ]: 0 : if (sh->config.dv_esw_en) {
594 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
595 : : MLX5DV_DR_DOMAIN_TYPE_FDB);
596 [ # # ]: 0 : if (!domain) {
597 : 0 : DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
598 : 0 : err = errno;
599 : 0 : goto error;
600 : : }
601 : 0 : sh->fdb_domain = domain;
602 : : }
603 : : /*
604 : : * The drop action is just some dummy placeholder in rdma-core. It
605 : : * does not belong to domains and has no any attributes, and, can be
606 : : * shared by the entire device.
607 : : */
608 : 0 : sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
609 [ # # ]: 0 : if (!sh->dr_drop_action) {
610 : 0 : DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
611 : 0 : err = errno;
612 : 0 : goto error;
613 : : }
614 : :
615 [ # # ]: 0 : if (sh->config.dv_flow_en == 1) {
616 : : /* Query availability of metadata reg_c's. */
617 [ # # ]: 0 : if (!priv->sh->metadata_regc_check_flag) {
618 : 0 : err = mlx5_flow_discover_mreg_c(eth_dev);
619 [ # # ]: 0 : if (err < 0) {
620 : 0 : err = -err;
621 : 0 : goto error;
622 : : }
623 : : }
624 [ # # ]: 0 : if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
625 : 0 : DRV_LOG(DEBUG,
626 : : "port %u extensive metadata register is not supported",
627 : : eth_dev->data->port_id);
628 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
629 : 0 : DRV_LOG(ERR, "metadata mode %u is not supported "
630 : : "(no metadata registers available)",
631 : : sh->config.dv_xmeta_en);
632 : : err = ENOTSUP;
633 : 0 : goto error;
634 : : }
635 : : }
636 [ # # # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
637 [ # # ]: 0 : mlx5_flow_ext_mreg_supported(eth_dev) && sh->dv_regc0_mask) {
638 : 0 : sh->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
639 : : MLX5_FLOW_MREG_HTABLE_SZ,
640 : : false, true, eth_dev,
641 : : mlx5_flow_dv_mreg_create_cb,
642 : : mlx5_flow_dv_mreg_match_cb,
643 : : mlx5_flow_dv_mreg_remove_cb,
644 : : mlx5_flow_dv_mreg_clone_cb,
645 : : mlx5_flow_dv_mreg_clone_free_cb);
646 [ # # ]: 0 : if (!sh->mreg_cp_tbl) {
647 : : err = ENOMEM;
648 : 0 : goto error;
649 : : }
650 : : }
651 : : }
652 : : #endif
653 [ # # # # ]: 0 : if (!sh->tunnel_hub && sh->config.dv_miss_info)
654 : 0 : err = mlx5_alloc_tunnel_hub(sh);
655 [ # # ]: 0 : if (err) {
656 : 0 : DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
657 : 0 : goto error;
658 : : }
659 [ # # ]: 0 : if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
660 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
661 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
662 [ # # ]: 0 : if (sh->fdb_domain)
663 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
664 : : }
665 : 0 : sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
666 [ # # ]: 0 : if (!sh->config.allow_duplicate_pattern) {
667 : : #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
668 : : DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
669 : : #endif
670 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
671 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
672 [ # # ]: 0 : if (sh->fdb_domain)
673 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
674 : : }
675 : :
676 : 0 : __mlx5_discovery_misc5_cap(priv);
677 : : #endif /* HAVE_MLX5DV_DR */
678 : 0 : LIST_INIT(&sh->shared_rxqs);
679 : 0 : return 0;
680 : 0 : error:
681 : : /* Rollback the created objects. */
682 [ # # ]: 0 : if (sh->rx_domain) {
683 : 0 : mlx5_glue->dr_destroy_domain(sh->rx_domain);
684 : 0 : sh->rx_domain = NULL;
685 : : }
686 [ # # ]: 0 : if (sh->tx_domain) {
687 : 0 : mlx5_glue->dr_destroy_domain(sh->tx_domain);
688 : 0 : sh->tx_domain = NULL;
689 : : }
690 [ # # ]: 0 : if (sh->fdb_domain) {
691 : 0 : mlx5_glue->dr_destroy_domain(sh->fdb_domain);
692 : 0 : sh->fdb_domain = NULL;
693 : : }
694 [ # # ]: 0 : if (sh->dr_drop_action) {
695 : 0 : mlx5_glue->destroy_flow_action(sh->dr_drop_action);
696 : 0 : sh->dr_drop_action = NULL;
697 : : }
698 [ # # ]: 0 : if (sh->pop_vlan_action) {
699 : 0 : mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
700 : 0 : sh->pop_vlan_action = NULL;
701 : : }
702 [ # # ]: 0 : if (sh->encaps_decaps) {
703 : 0 : mlx5_hlist_destroy(sh->encaps_decaps);
704 : 0 : sh->encaps_decaps = NULL;
705 : : }
706 [ # # ]: 0 : if (sh->modify_cmds) {
707 : 0 : mlx5_hlist_destroy(sh->modify_cmds);
708 : 0 : sh->modify_cmds = NULL;
709 : : }
710 [ # # ]: 0 : if (sh->tag_table) {
711 : : /* tags should be destroyed with flow before. */
712 : 0 : mlx5_hlist_destroy(sh->tag_table);
713 : 0 : sh->tag_table = NULL;
714 : : }
715 [ # # ]: 0 : if (sh->tunnel_hub) {
716 : 0 : mlx5_release_tunnel_hub(sh, priv->dev_port);
717 : 0 : sh->tunnel_hub = NULL;
718 : : }
719 : 0 : mlx5_free_table_hash_list(priv);
720 [ # # ]: 0 : if (sh->port_id_action_list) {
721 : 0 : mlx5_list_destroy(sh->port_id_action_list);
722 : 0 : sh->port_id_action_list = NULL;
723 : : }
724 [ # # ]: 0 : if (sh->push_vlan_action_list) {
725 : 0 : mlx5_list_destroy(sh->push_vlan_action_list);
726 : 0 : sh->push_vlan_action_list = NULL;
727 : : }
728 [ # # ]: 0 : if (sh->sample_action_list) {
729 : 0 : mlx5_list_destroy(sh->sample_action_list);
730 : 0 : sh->sample_action_list = NULL;
731 : : }
732 [ # # ]: 0 : if (sh->dest_array_list) {
733 : 0 : mlx5_list_destroy(sh->dest_array_list);
734 : 0 : sh->dest_array_list = NULL;
735 : : }
736 [ # # ]: 0 : if (sh->mreg_cp_tbl) {
737 : 0 : mlx5_hlist_destroy(sh->mreg_cp_tbl);
738 : 0 : sh->mreg_cp_tbl = NULL;
739 : : }
740 : : return err;
741 : : }
742 : :
743 : : #ifdef HAVE_MLX5DV_DR
744 : : static void
745 : 0 : mlx5_destroy_send_to_kernel_action(struct mlx5_dev_ctx_shared *sh)
746 : : {
747 : : int i;
748 : :
749 [ # # ]: 0 : for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) {
750 [ # # ]: 0 : if (sh->send_to_kernel_action[i].action) {
751 : : void *action = sh->send_to_kernel_action[i].action;
752 : :
753 : 0 : mlx5_glue->destroy_flow_action(action);
754 : 0 : sh->send_to_kernel_action[i].action = NULL;
755 : : }
756 [ # # ]: 0 : if (sh->send_to_kernel_action[i].tbl) {
757 : : struct mlx5_flow_tbl_resource *tbl =
758 : : sh->send_to_kernel_action[i].tbl;
759 : :
760 : 0 : mlx5_flow_dv_tbl_resource_release(sh, tbl);
761 : 0 : sh->send_to_kernel_action[i].tbl = NULL;
762 : : }
763 : : }
764 : 0 : }
765 : : #endif /* HAVE_MLX5DV_DR */
766 : :
767 : : /**
768 : : * Destroy DR related data within private structure.
769 : : *
770 : : * @param[in] priv
771 : : * Pointer to the private device data structure.
772 : : */
773 : : void
774 : 0 : mlx5_os_free_shared_dr(struct mlx5_priv *priv)
775 : : {
776 : 0 : struct mlx5_dev_ctx_shared *sh = priv->sh;
777 : : struct mlx5_rxq_ctrl *rxq_ctrl;
778 : : int i = 0;
779 : :
780 : : MLX5_ASSERT(sh && sh->refcnt);
781 [ # # ]: 0 : if (sh->refcnt > 1)
782 : : return;
783 [ # # ]: 0 : LIST_FOREACH(rxq_ctrl, &sh->shared_rxqs, next) {
784 : 0 : DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
785 : : priv->dev_data->port_id, rxq_ctrl->rxq.idx);
786 : 0 : ++i;
787 : : }
788 [ # # ]: 0 : if (i > 0)
789 : 0 : DRV_LOG(WARNING, "port %u some Rx queues still remain %d",
790 : : priv->dev_data->port_id, i);
791 : : MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
792 : : #ifdef HAVE_MLX5DV_DR
793 : 0 : mlx5_destroy_send_to_kernel_action(sh);
794 [ # # ]: 0 : if (sh->rx_domain) {
795 : 0 : mlx5_glue->dr_destroy_domain(sh->rx_domain);
796 : 0 : sh->rx_domain = NULL;
797 : : }
798 [ # # ]: 0 : if (sh->tx_domain) {
799 : 0 : mlx5_glue->dr_destroy_domain(sh->tx_domain);
800 : 0 : sh->tx_domain = NULL;
801 : : }
802 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
803 [ # # ]: 0 : if (sh->fdb_domain) {
804 : 0 : mlx5_glue->dr_destroy_domain(sh->fdb_domain);
805 : 0 : sh->fdb_domain = NULL;
806 : : }
807 [ # # ]: 0 : if (sh->dr_drop_action) {
808 : 0 : mlx5_glue->destroy_flow_action(sh->dr_drop_action);
809 : 0 : sh->dr_drop_action = NULL;
810 : : }
811 : : #endif
812 [ # # ]: 0 : if (sh->pop_vlan_action) {
813 : 0 : mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
814 : 0 : sh->pop_vlan_action = NULL;
815 : : }
816 [ # # ]: 0 : for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) {
817 [ # # ]: 0 : if (sh->send_to_kernel_action[i].action) {
818 : : void *action = sh->send_to_kernel_action[i].action;
819 : :
820 : 0 : mlx5_glue->destroy_flow_action(action);
821 : 0 : sh->send_to_kernel_action[i].action = NULL;
822 : : }
823 [ # # ]: 0 : if (sh->send_to_kernel_action[i].tbl) {
824 : : struct mlx5_flow_tbl_resource *tbl =
825 : : sh->send_to_kernel_action[i].tbl;
826 : :
827 : 0 : mlx5_flow_dv_tbl_resource_release(sh, tbl);
828 : 0 : sh->send_to_kernel_action[i].tbl = NULL;
829 : : }
830 : : }
831 : : #endif /* HAVE_MLX5DV_DR */
832 [ # # ]: 0 : if (sh->default_miss_action)
833 : 0 : mlx5_glue->destroy_flow_action
834 : : (sh->default_miss_action);
835 [ # # ]: 0 : if (sh->encaps_decaps) {
836 : 0 : mlx5_hlist_destroy(sh->encaps_decaps);
837 : 0 : sh->encaps_decaps = NULL;
838 : : }
839 [ # # ]: 0 : if (sh->modify_cmds) {
840 : 0 : mlx5_hlist_destroy(sh->modify_cmds);
841 : 0 : sh->modify_cmds = NULL;
842 : : }
843 [ # # ]: 0 : if (sh->tag_table) {
844 : : /* tags should be destroyed with flow before. */
845 : 0 : mlx5_hlist_destroy(sh->tag_table);
846 : 0 : sh->tag_table = NULL;
847 : : }
848 [ # # ]: 0 : if (sh->tunnel_hub) {
849 : 0 : mlx5_release_tunnel_hub(sh, priv->dev_port);
850 : 0 : sh->tunnel_hub = NULL;
851 : : }
852 : 0 : mlx5_free_table_hash_list(priv);
853 [ # # ]: 0 : if (sh->port_id_action_list) {
854 : 0 : mlx5_list_destroy(sh->port_id_action_list);
855 : 0 : sh->port_id_action_list = NULL;
856 : : }
857 [ # # ]: 0 : if (sh->push_vlan_action_list) {
858 : 0 : mlx5_list_destroy(sh->push_vlan_action_list);
859 : 0 : sh->push_vlan_action_list = NULL;
860 : : }
861 [ # # ]: 0 : if (sh->sample_action_list) {
862 : 0 : mlx5_list_destroy(sh->sample_action_list);
863 : 0 : sh->sample_action_list = NULL;
864 : : }
865 [ # # ]: 0 : if (sh->dest_array_list) {
866 : 0 : mlx5_list_destroy(sh->dest_array_list);
867 : 0 : sh->dest_array_list = NULL;
868 : : }
869 [ # # ]: 0 : if (sh->mreg_cp_tbl) {
870 : 0 : mlx5_hlist_destroy(sh->mreg_cp_tbl);
871 : 0 : sh->mreg_cp_tbl = NULL;
872 : : }
873 : : }
874 : :
875 : : /**
876 : : * Initialize shared data between primary and secondary process.
877 : : *
878 : : * A memzone is reserved by primary process and secondary processes attach to
879 : : * the memzone.
880 : : *
881 : : * @return
882 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
883 : : */
884 : : static int
885 : 0 : mlx5_init_shared_data(void)
886 : : {
887 : : const struct rte_memzone *mz;
888 : : int ret = 0;
889 : :
890 : : rte_spinlock_lock(&mlx5_shared_data_lock);
891 [ # # ]: 0 : if (mlx5_shared_data == NULL) {
892 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
893 : : /* Allocate shared memory. */
894 : 0 : mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
895 : : sizeof(*mlx5_shared_data),
896 : : SOCKET_ID_ANY, 0);
897 [ # # ]: 0 : if (mz == NULL) {
898 : 0 : DRV_LOG(ERR,
899 : : "Cannot allocate mlx5 shared data");
900 : 0 : ret = -rte_errno;
901 : 0 : goto error;
902 : : }
903 : 0 : mlx5_shared_data = mz->addr;
904 : : memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
905 : 0 : rte_spinlock_init(&mlx5_shared_data->lock);
906 : : } else {
907 : : /* Lookup allocated shared memory. */
908 : 0 : mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
909 [ # # ]: 0 : if (mz == NULL) {
910 : 0 : DRV_LOG(ERR,
911 : : "Cannot attach mlx5 shared data");
912 : 0 : ret = -rte_errno;
913 : 0 : goto error;
914 : : }
915 : 0 : mlx5_shared_data = mz->addr;
916 : : memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
917 : : }
918 : : }
919 : 0 : error:
920 : : rte_spinlock_unlock(&mlx5_shared_data_lock);
921 : 0 : return ret;
922 : : }
923 : :
924 : : /**
925 : : * PMD global initialization.
926 : : *
927 : : * Independent from individual device, this function initializes global
928 : : * per-PMD data structures distinguishing primary and secondary processes.
929 : : * Hence, each initialization is called once per a process.
930 : : *
931 : : * @return
932 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
933 : : */
934 : : static int
935 : 0 : mlx5_init_once(void)
936 : : {
937 : : struct mlx5_shared_data *sd;
938 : : struct mlx5_local_data *ld = &mlx5_local_data;
939 : : int ret = 0;
940 : :
941 [ # # ]: 0 : if (mlx5_init_shared_data())
942 : 0 : return -rte_errno;
943 : 0 : sd = mlx5_shared_data;
944 : : MLX5_ASSERT(sd);
945 : 0 : rte_spinlock_lock(&sd->lock);
946 [ # # # ]: 0 : switch (rte_eal_process_type()) {
947 : 0 : case RTE_PROC_PRIMARY:
948 [ # # ]: 0 : if (sd->init_done)
949 : : break;
950 : 0 : ret = mlx5_mp_init_primary(MLX5_MP_NAME,
951 : : mlx5_mp_os_primary_handle);
952 [ # # ]: 0 : if (ret)
953 : 0 : goto out;
954 : 0 : sd->init_done = true;
955 : 0 : break;
956 : 0 : case RTE_PROC_SECONDARY:
957 [ # # ]: 0 : if (ld->init_done)
958 : : break;
959 : 0 : ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
960 : : mlx5_mp_os_secondary_handle);
961 [ # # ]: 0 : if (ret)
962 : 0 : goto out;
963 : 0 : ++sd->secondary_cnt;
964 : 0 : ld->init_done = true;
965 : 0 : break;
966 : : default:
967 : : break;
968 : : }
969 : 0 : out:
970 : : rte_spinlock_unlock(&sd->lock);
971 : 0 : return ret;
972 : : }
973 : :
974 : : /**
975 : : * DR flow drop action support detect.
976 : : *
977 : : * @param dev
978 : : * Pointer to rte_eth_dev structure.
979 : : *
980 : : */
981 : : static void
982 : 0 : mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
983 : : {
984 : : #ifdef HAVE_MLX5DV_DR
985 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
986 : :
987 [ # # # # ]: 0 : if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
988 : : return;
989 : : /**
990 : : * DR supports drop action placeholder when it is supported;
991 : : * otherwise, use the queue drop action.
992 : : */
993 [ # # ]: 0 : if (!priv->sh->drop_action_check_flag) {
994 [ # # ]: 0 : if (!mlx5_flow_discover_dr_action_support(dev))
995 : 0 : priv->sh->dr_root_drop_action_en = 1;
996 : 0 : priv->sh->drop_action_check_flag = 1;
997 : : }
998 [ # # ]: 0 : if (priv->sh->dr_root_drop_action_en)
999 : 0 : priv->root_drop_action = priv->sh->dr_drop_action;
1000 : : else
1001 : 0 : priv->root_drop_action = priv->drop_queue.hrxq->action;
1002 : : #endif
1003 : : }
1004 : :
1005 : : static void
1006 : 0 : mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
1007 : : {
1008 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
1009 : 0 : void *ctx = priv->sh->cdev->ctx;
1010 : :
1011 : 0 : priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx, NULL);
1012 [ # # ]: 0 : if (!priv->q_counters) {
1013 : 0 : struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
1014 : : struct ibv_wq *wq;
1015 : :
1016 : 0 : DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
1017 : : "by DevX - fall-back to use the kernel driver global "
1018 : : "queue counter.", dev->data->port_id);
1019 : :
1020 : : /* Create WQ by kernel and query its queue counter ID. */
1021 [ # # ]: 0 : if (cq) {
1022 : 0 : wq = mlx5_glue->create_wq(ctx,
1023 : 0 : &(struct ibv_wq_init_attr){
1024 : : .wq_type = IBV_WQT_RQ,
1025 : : .max_wr = 1,
1026 : : .max_sge = 1,
1027 : 0 : .pd = priv->sh->cdev->pd,
1028 : : .cq = cq,
1029 : : });
1030 [ # # ]: 0 : if (wq) {
1031 : : /* Counter is assigned only on RDY state. */
1032 : 0 : int ret = mlx5_glue->modify_wq(wq,
1033 : 0 : &(struct ibv_wq_attr){
1034 : : .attr_mask = IBV_WQ_ATTR_STATE,
1035 : : .wq_state = IBV_WQS_RDY,
1036 : : });
1037 : :
1038 [ # # ]: 0 : if (ret == 0)
1039 : 0 : mlx5_devx_cmd_wq_query(wq,
1040 : : &priv->counter_set_id);
1041 : 0 : claim_zero(mlx5_glue->destroy_wq(wq));
1042 : : }
1043 : 0 : claim_zero(mlx5_glue->destroy_cq(cq));
1044 : : }
1045 : : } else {
1046 : 0 : priv->counter_set_id = priv->q_counters->id;
1047 : : }
1048 [ # # ]: 0 : if (priv->counter_set_id == 0)
1049 : 0 : DRV_LOG(INFO, "Part of the port %d statistics will not be "
1050 : : "available.", dev->data->port_id);
1051 : 0 : }
1052 : :
1053 : : static inline bool
1054 : : mlx5_ignore_pf_representor(const struct rte_eth_devargs *eth_da)
1055 : : {
1056 : 0 : return (eth_da->flags & RTE_ETH_DEVARG_REPRESENTOR_IGNORE_PF) != 0;
1057 : : }
1058 : :
1059 : : static bool
1060 : : is_standard_eswitch(const struct mlx5_dev_spawn_data *spawn)
1061 : : {
1062 : 0 : bool is_bond = spawn->pf_bond >= 0;
1063 : :
1064 [ # # # # : 0 : return !is_bond && spawn->nb_uplinks <= 1 && spawn->nb_hpfs <= 1;
# # # # #
# ]
1065 : : }
1066 : :
1067 : : static bool
1068 : : is_hpf(const struct mlx5_dev_spawn_data *spawn)
1069 : : {
1070 [ # # # # : 0 : return spawn->info.port_name == -1 &&
# # # # ]
1071 [ # # # # ]: 0 : spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF;
1072 : : }
1073 : :
1074 : : static int
1075 : 0 : build_port_name(struct rte_device *dpdk_dev,
1076 : : struct mlx5_dev_spawn_data *spawn,
1077 : : char *name,
1078 : : size_t name_sz)
1079 : : {
1080 : 0 : bool is_bond = spawn->pf_bond >= 0;
1081 : : int written = 0;
1082 : : int ret;
1083 : :
1084 [ # # ]: 0 : ret = snprintf(name, name_sz, "%s", dpdk_dev->name);
1085 [ # # ]: 0 : if (ret < 0)
1086 : : return ret;
1087 : : written += ret;
1088 [ # # ]: 0 : if (written >= (int)name_sz)
1089 : : return written;
1090 : :
1091 : : /*
1092 : : * Whenever bond device is detected, include IB device name.
1093 : : * This is kept to keep port naming backward compatible.
1094 : : */
1095 [ # # ]: 0 : if (is_bond) {
1096 [ # # ]: 0 : ret = snprintf(name + written, name_sz - written, "_%s", spawn->phys_dev_name);
1097 [ # # ]: 0 : if (ret < 0)
1098 : : return ret;
1099 : 0 : written += ret;
1100 [ # # ]: 0 : if (written >= (int)name_sz)
1101 : : return written;
1102 : : }
1103 : :
1104 [ # # ]: 0 : if (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1105 : : /* Add port to name if and only if there is more than one uplink. */
1106 [ # # ]: 0 : if (spawn->nb_uplinks <= 1)
1107 : 0 : goto end;
1108 : :
1109 [ # # ]: 0 : ret = snprintf(name + written, name_sz - written, "_p%u", spawn->info.port_name);
1110 [ # # ]: 0 : if (ret < 0)
1111 : : return ret;
1112 : 0 : written += ret;
1113 : : if (written >= (int)name_sz)
1114 : : return written;
1115 [ # # ]: 0 : } else if (spawn->info.representor) {
1116 : : /*
1117 : : * If port is a representor, then switchdev has been enabled.
1118 : : * In that case add controller, PF and VF/SF indexes to port name
1119 : : * if at least one of these conditions are met:
1120 : : * 1. Device is a bond (VF-LAG).
1121 : : * 2. There are multiple uplinks (MPESW).
1122 : : * 3. There are multiple host PFs (BlueField socket direct).
1123 : : *
1124 : : * If none of these conditions apply, then it is assumed that
1125 : : * this device manages a single non-shared E-Switch with single controller,
1126 : : * where there is only one uplink/PF and one host PF (on BlueField).
1127 : : */
1128 [ # # ]: 0 : if (!is_standard_eswitch(spawn))
1129 [ # # ]: 0 : ret = snprintf(name + written, name_sz - written,
1130 : : "_representor_c%dpf%d%s%u",
1131 : : spawn->info.ctrl_num,
1132 : : spawn->info.pf_num,
1133 : : spawn->info.name_type ==
1134 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1135 : : spawn->info.port_name);
1136 : : else
1137 [ # # ]: 0 : ret = snprintf(name + written, name_sz - written, "_representor_%s%u",
1138 : : spawn->info.name_type ==
1139 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1140 : : spawn->info.port_name);
1141 [ # # ]: 0 : if (ret < 0)
1142 : : return ret;
1143 : 0 : written += ret;
1144 : : if (written >= (int)name_sz)
1145 : : return written;
1146 : : }
1147 : :
1148 : 0 : end:
1149 : : return written;
1150 : : }
1151 : :
1152 : : static bool
1153 : : representor_match_uplink(const struct mlx5_dev_spawn_data *spawn,
1154 : : uint16_t port_name,
1155 : : const struct rte_eth_devargs *eth_da,
1156 : : uint16_t eth_da_pf_num)
1157 : : {
1158 : 0 : if (spawn->info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1159 : : return false;
1160 : : /* One of the uplinks will be a transfer proxy. Must be probed always. */
1161 [ # # # # ]: 0 : if (spawn->info.master)
1162 : : return true;
1163 [ # # # # ]: 0 : if (mlx5_ignore_pf_representor(eth_da))
1164 : : return false;
1165 : :
1166 : 0 : return port_name == eth_da_pf_num;
1167 : : }
1168 : :
1169 : : static bool
1170 : 0 : representor_match_port(const struct mlx5_dev_spawn_data *spawn,
1171 : : const struct rte_eth_devargs *eth_da)
1172 : : {
1173 [ # # ]: 0 : for (uint16_t p = 0; p < eth_da->nb_ports; ++p) {
1174 : 0 : uint16_t pf_num = eth_da->ports[p];
1175 : :
1176 : : /* PF representor in devargs is interpreted as probing uplink port. */
1177 [ # # ]: 0 : if (eth_da->type == RTE_ETH_REPRESENTOR_PF) {
1178 [ # # # # ]: 0 : if (representor_match_uplink(spawn, spawn->info.port_name, eth_da, pf_num))
1179 : : return true;
1180 : :
1181 : 0 : continue;
1182 : : }
1183 : :
1184 : : /* Allow probing related uplink when VF/SF representor is requested. */
1185 [ # # ]: 0 : if ((eth_da->type == RTE_ETH_REPRESENTOR_VF ||
1186 [ # # ]: 0 : eth_da->type == RTE_ETH_REPRESENTOR_SF) &&
1187 [ # # ]: 0 : representor_match_uplink(spawn, spawn->info.pf_num, eth_da, pf_num))
1188 : : return true;
1189 : :
1190 : : /* Uplink ports should not be matched against representor_ports. */
1191 [ # # ]: 0 : if (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1192 : 0 : continue;
1193 : :
1194 [ # # ]: 0 : for (uint16_t f = 0; f < eth_da->nb_representor_ports; ++f) {
1195 [ # # ]: 0 : uint16_t port_num = eth_da->representor_ports[f];
1196 : : bool pf_num_match;
1197 : : bool rep_num_match;
1198 : :
1199 : : /*
1200 : : * In standard E-Switch case, allow probing VFs even if wrong PF index
1201 : : * was provided.
1202 : : */
1203 [ # # ]: 0 : if (is_standard_eswitch(spawn))
1204 : : pf_num_match = true;
1205 : : else
1206 : 0 : pf_num_match = spawn->info.pf_num == pf_num;
1207 : :
1208 : : /* Host PF is indicated through VF/SF representor index == -1. */
1209 [ # # ]: 0 : if (is_hpf(spawn))
1210 : 0 : rep_num_match = port_num == UINT16_MAX;
1211 : : else
1212 : 0 : rep_num_match = port_num == spawn->info.port_name;
1213 : :
1214 [ # # ]: 0 : if (pf_num_match && rep_num_match)
1215 : : return true;
1216 : : }
1217 : : }
1218 : :
1219 : : return false;
1220 : : }
1221 : :
1222 : : /**
1223 : : * Check if representor spawn info match devargs.
1224 : : *
1225 : : * @param spawn
1226 : : * Verbs device parameters (name, port, switch_info) to spawn.
1227 : : * @param eth_da
1228 : : * Device devargs to probe.
1229 : : *
1230 : : * @return
1231 : : * Match result.
1232 : : */
1233 : : static bool
1234 : 0 : mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
1235 : : struct rte_eth_devargs *eth_da)
1236 : : {
1237 : : struct mlx5_switch_info *switch_info = &spawn->info;
1238 : : unsigned int c;
1239 [ # # ]: 0 : bool ignore_ctrl_num = eth_da->nb_mh_controllers == 0 ||
1240 [ # # ]: 0 : switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
1241 : :
1242 [ # # # # : 0 : switch (eth_da->type) {
# ]
1243 : 0 : case RTE_ETH_REPRESENTOR_PF:
1244 [ # # ]: 0 : if (switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1245 : 0 : rte_errno = EBUSY;
1246 : 0 : return false;
1247 : : }
1248 : : break;
1249 : : case RTE_ETH_REPRESENTOR_SF:
1250 [ # # ]: 0 : if (!is_hpf(spawn) &&
1251 [ # # # # ]: 0 : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF &&
1252 : : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1253 : 0 : rte_errno = EBUSY;
1254 : 0 : return false;
1255 : : }
1256 : : break;
1257 : : case RTE_ETH_REPRESENTOR_VF:
1258 [ # # ]: 0 : if (!is_hpf(spawn) &&
1259 [ # # # # ]: 0 : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF &&
1260 : : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1261 : 0 : rte_errno = EBUSY;
1262 : 0 : return false;
1263 : : }
1264 : : break;
1265 : 0 : case RTE_ETH_REPRESENTOR_NONE:
1266 : 0 : rte_errno = EBUSY;
1267 : 0 : return false;
1268 : 0 : default:
1269 : 0 : rte_errno = ENOTSUP;
1270 : 0 : DRV_LOG(ERR, "unsupported representor type");
1271 : 0 : return false;
1272 : : }
1273 [ # # ]: 0 : if (!ignore_ctrl_num) {
1274 [ # # ]: 0 : for (c = 0; c < eth_da->nb_mh_controllers; ++c) {
1275 : 0 : uint16_t ctrl_num = eth_da->mh_controllers[c];
1276 : :
1277 [ # # # # ]: 0 : if (spawn->info.ctrl_num == ctrl_num &&
1278 : 0 : representor_match_port(spawn, eth_da))
1279 : : return true;
1280 : : }
1281 : : } else {
1282 [ # # ]: 0 : if (representor_match_port(spawn, eth_da))
1283 : : return true;
1284 : : }
1285 : 0 : rte_errno = EBUSY;
1286 : 0 : return false;
1287 : : }
1288 : :
1289 : : /**
1290 : : * Spawn an Ethernet device from Verbs information.
1291 : : *
1292 : : * @param dpdk_dev
1293 : : * Backing DPDK device.
1294 : : * @param spawn
1295 : : * Verbs device parameters (name, port, switch_info) to spawn.
1296 : : * @param eth_da
1297 : : * Device arguments.
1298 : : * @param mkvlist
1299 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
1300 : : *
1301 : : * @return
1302 : : * A valid Ethernet device object on success, NULL otherwise and rte_errno
1303 : : * is set. The following errors are defined:
1304 : : *
1305 : : * EBUSY: device is not supposed to be spawned.
1306 : : * EEXIST: device is already spawned
1307 : : */
1308 : : static struct rte_eth_dev *
1309 : 0 : mlx5_dev_spawn(struct rte_device *dpdk_dev,
1310 : : struct mlx5_dev_spawn_data *spawn,
1311 : : struct rte_eth_devargs *eth_da,
1312 : : struct mlx5_kvargs_ctrl *mkvlist)
1313 : : {
1314 : 0 : const struct mlx5_switch_info *switch_info = &spawn->info;
1315 : : struct mlx5_dev_ctx_shared *sh = NULL;
1316 : 0 : struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
1317 : : struct rte_eth_dev *eth_dev = NULL;
1318 : : struct mlx5_priv *priv = NULL;
1319 : : int err = 0;
1320 : : struct rte_ether_addr mac;
1321 : : char name[RTE_ETH_NAME_MAX_LEN];
1322 : : int own_domain_id = 0;
1323 : : uint16_t port_id;
1324 : 0 : struct mlx5_port_info vport_info = { .query_flags = 0 };
1325 : : int nl_rdma;
1326 : : int i;
1327 : : struct mlx5_indexed_pool_config icfg[RTE_DIM(default_icfg)];
1328 : :
1329 : : memcpy(icfg, default_icfg, sizeof(icfg));
1330 : : /* Determine if this port representor is supposed to be spawned. */
1331 [ # # # # : 0 : if (switch_info->representor && dpdk_dev->devargs &&
# # ]
1332 : 0 : !mlx5_representor_match(spawn, eth_da))
1333 : : return NULL;
1334 : : /* Build device name. */
1335 : 0 : err = build_port_name(dpdk_dev, spawn, name, sizeof(name));
1336 [ # # ]: 0 : if (err < 0) {
1337 : 0 : DRV_LOG(ERR, "Failed to build port name for IB device %s/%u",
1338 : : spawn->phys_dev_name, spawn->phys_port);
1339 : 0 : rte_errno = EINVAL;
1340 : 0 : return NULL;
1341 : : }
1342 [ # # ]: 0 : if (err >= (int)sizeof(name))
1343 : 0 : DRV_LOG(WARNING, "device name overflow %s", name);
1344 : : /* check if the device is already spawned */
1345 [ # # ]: 0 : if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1346 : : /*
1347 : : * When device is already spawned, its devargs should be set
1348 : : * as used. otherwise, mlx5_kvargs_validate() will fail.
1349 : : */
1350 [ # # ]: 0 : if (mkvlist)
1351 : 0 : mlx5_port_args_set_used(name, port_id, mkvlist);
1352 : 0 : rte_errno = EEXIST;
1353 : 0 : return NULL;
1354 : : }
1355 : 0 : DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1356 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1357 : : struct mlx5_mp_id mp_id;
1358 : : int fd;
1359 : :
1360 : 0 : eth_dev = rte_eth_dev_attach_secondary(name);
1361 [ # # ]: 0 : if (eth_dev == NULL) {
1362 : 0 : DRV_LOG(ERR, "can not attach rte ethdev");
1363 : 0 : rte_errno = ENOMEM;
1364 : 0 : return NULL;
1365 : : }
1366 : 0 : eth_dev->device = dpdk_dev;
1367 : 0 : eth_dev->dev_ops = &mlx5_dev_sec_ops;
1368 : 0 : eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1369 : 0 : eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1370 : 0 : err = mlx5_proc_priv_init(eth_dev);
1371 [ # # ]: 0 : if (err)
1372 : : return NULL;
1373 : 0 : mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1374 : : /* Receive command fd from primary process */
1375 : 0 : fd = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1376 [ # # ]: 0 : if (fd < 0)
1377 : 0 : goto err_secondary;
1378 : : /* Remap UAR for Tx queues. */
1379 : 0 : err = mlx5_tx_uar_init_secondary(eth_dev, fd);
1380 : 0 : close(fd);
1381 [ # # ]: 0 : if (err)
1382 : 0 : goto err_secondary;
1383 : : /*
1384 : : * Ethdev pointer is still required as input since
1385 : : * the primary device is not accessible from the
1386 : : * secondary process.
1387 : : */
1388 : 0 : eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1389 : 0 : eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1390 : 0 : return eth_dev;
1391 : 0 : err_secondary:
1392 : 0 : mlx5_dev_close(eth_dev);
1393 : 0 : return NULL;
1394 : : }
1395 : 0 : sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);
1396 [ # # ]: 0 : if (!sh)
1397 : : return NULL;
1398 : 0 : nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
1399 : : /* Check port status. */
1400 [ # # ]: 0 : if (spawn->phys_port <= UINT8_MAX) {
1401 : : /* Legacy Verbs api only support u8 port number. */
1402 : 0 : err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1403 : : &port_attr);
1404 [ # # ]: 0 : if (err) {
1405 : 0 : DRV_LOG(ERR, "port query failed: %s", strerror(err));
1406 : 0 : goto error;
1407 : : }
1408 [ # # ]: 0 : if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1409 : 0 : DRV_LOG(ERR, "port is not configured in Ethernet mode");
1410 : : err = EINVAL;
1411 : 0 : goto error;
1412 : : }
1413 [ # # ]: 0 : } else if (nl_rdma >= 0) {
1414 : : /* IB doesn't allow more than 255 ports, must be Ethernet. */
1415 : 0 : err = mlx5_nl_port_state(nl_rdma,
1416 : : spawn->phys_dev_name,
1417 : 0 : spawn->phys_port, &spawn->cdev->dev_info);
1418 [ # # ]: 0 : if (err < 0) {
1419 : 0 : DRV_LOG(INFO, "Failed to get netlink port state: %s",
1420 : : strerror(rte_errno));
1421 : 0 : err = -rte_errno;
1422 : 0 : goto error;
1423 : : }
1424 : 0 : port_attr.state = (enum ibv_port_state)err;
1425 : : }
1426 [ # # ]: 0 : if (port_attr.state != IBV_PORT_ACTIVE)
1427 : 0 : DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1428 : : mlx5_glue->port_state_str(port_attr.state),
1429 : : port_attr.state);
1430 : : /* Allocate private eth device data. */
1431 : 0 : priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1432 : : sizeof(*priv),
1433 : : RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1434 [ # # ]: 0 : if (priv == NULL) {
1435 : 0 : DRV_LOG(ERR, "priv allocation failure");
1436 : : err = ENOMEM;
1437 : 0 : goto error;
1438 : : }
1439 : : /*
1440 : : * When user configures remote PD and CTX and device creates RxQ by
1441 : : * DevX, external RxQ is both supported and requested.
1442 : : */
1443 [ # # # # : 0 : if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) {
# # ]
1444 : 0 : priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1445 : : sizeof(struct mlx5_external_q) *
1446 : : MLX5_MAX_EXT_RX_QUEUES, 0,
1447 : : SOCKET_ID_ANY);
1448 [ # # ]: 0 : if (priv->ext_rxqs == NULL) {
1449 : 0 : DRV_LOG(ERR, "Fail to allocate external RxQ array.");
1450 : : err = ENOMEM;
1451 : 0 : goto error;
1452 : : }
1453 : 0 : priv->ext_txqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1454 : : sizeof(struct mlx5_external_q) *
1455 : : MLX5_MAX_EXT_TX_QUEUES, 0,
1456 : : SOCKET_ID_ANY);
1457 [ # # ]: 0 : if (priv->ext_txqs == NULL) {
1458 : 0 : DRV_LOG(ERR, "Fail to allocate external TxQ array.");
1459 : : err = ENOMEM;
1460 : 0 : goto error;
1461 : : }
1462 : 0 : DRV_LOG(DEBUG, "External queue is supported.");
1463 : : }
1464 : 0 : priv->sh = sh;
1465 : 0 : priv->dev_port = spawn->phys_port;
1466 : 0 : priv->pci_dev = spawn->pci_dev;
1467 : : /* Some internal functions rely on Netlink sockets, open them now. */
1468 : 0 : priv->nl_socket_rdma = nl_rdma;
1469 : 0 : priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0);
1470 : 0 : priv->representor = !!switch_info->representor;
1471 : 0 : priv->master = !!switch_info->master;
1472 : 0 : priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1473 : 0 : priv->vport_meta_tag = 0;
1474 : 0 : priv->vport_meta_mask = 0;
1475 : 0 : priv->pf_bond = spawn->pf_bond;
1476 : 0 : priv->mpesw_port = spawn->mpesw_port;
1477 : 0 : priv->mpesw_uplink = false;
1478 : 0 : priv->mpesw_owner = spawn->info.mpesw_owner;
1479 [ # # ]: 0 : if (mlx5_is_port_on_mpesw_device(priv))
1480 : 0 : priv->mpesw_uplink = (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK);
1481 : :
1482 [ # # ]: 0 : DRV_LOG(DEBUG,
1483 : : "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d "
1484 : : "mpesw_port=%d mpesw_uplink=%d",
1485 : : priv->dev_port, dpdk_dev->bus->name,
1486 : : priv->pci_dev ? priv->pci_dev->name : "NONE",
1487 : : priv->master, priv->representor, priv->pf_bond,
1488 : : priv->mpesw_port, priv->mpesw_uplink);
1489 : :
1490 [ # # # # ]: 0 : if (mlx5_is_port_on_mpesw_device(priv) && priv->sh->config.dv_flow_en != 2) {
1491 : 0 : DRV_LOG(ERR, "MPESW device is supported only with HWS");
1492 : : err = ENOTSUP;
1493 : 0 : goto error;
1494 : : }
1495 : : /*
1496 : : * If we have E-Switch we should determine the vport attributes.
1497 : : * E-Switch may use either source vport field or reg_c[0] metadata
1498 : : * register to match on vport index. The engaged part of metadata
1499 : : * register is defined by mask.
1500 : : */
1501 [ # # ]: 0 : if (sh->esw_mode) {
1502 : 0 : err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1503 : : spawn->phys_port,
1504 : : &vport_info);
1505 [ # # ]: 0 : if (err) {
1506 : 0 : DRV_LOG(WARNING,
1507 : : "Cannot query devx port %d on device %s",
1508 : : spawn->phys_port, spawn->phys_dev_name);
1509 : 0 : vport_info.query_flags = 0;
1510 : : }
1511 : : }
1512 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1513 : 0 : priv->vport_meta_tag = vport_info.vport_meta_tag;
1514 : 0 : priv->vport_meta_mask = vport_info.vport_meta_mask;
1515 [ # # ]: 0 : if (!priv->vport_meta_mask) {
1516 : 0 : DRV_LOG(ERR,
1517 : : "vport zero mask for port %d on bonding device %s",
1518 : : spawn->phys_port, spawn->phys_dev_name);
1519 : : err = ENOTSUP;
1520 : 0 : goto error;
1521 : : }
1522 [ # # ]: 0 : if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1523 : 0 : DRV_LOG(ERR,
1524 : : "Invalid vport tag for port %d on bonding device %s",
1525 : : spawn->phys_port, spawn->phys_dev_name);
1526 : : err = ENOTSUP;
1527 : 0 : goto error;
1528 : : }
1529 : : }
1530 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT_VHCA_ID)
1531 : 0 : priv->vport_vhca_id = vport_info.vport_vhca_id;
1532 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1533 : 0 : priv->vport_id = vport_info.vport_id;
1534 [ # # # # ]: 0 : } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1535 : 0 : DRV_LOG(ERR,
1536 : : "Cannot deduce vport index for port %d on bonding device %s",
1537 : : spawn->phys_port, spawn->phys_dev_name);
1538 : : err = ENOTSUP;
1539 : 0 : goto error;
1540 : : } else {
1541 : : /*
1542 : : * Suppose vport index in compatible way. Kernel/rdma_core
1543 : : * support single E-Switch per PF configurations only and
1544 : : * vport_id field contains the vport index for associated VF,
1545 : : * which is deduced from representor port name.
1546 : : * For example, let's have the IB device port 10, it has
1547 : : * attached network device eth0, which has port name attribute
1548 : : * pf0vf2, we can deduce the VF number as 2, and set vport index
1549 : : * as 3 (2+1). This assigning schema should be changed if the
1550 : : * multiple E-Switch instances per PF configurations or/and PCI
1551 : : * subfunctions are added.
1552 : : */
1553 [ # # ]: 0 : priv->vport_id = switch_info->representor ?
1554 : 0 : switch_info->port_name + 1 : -1;
1555 : : }
1556 : 0 : priv->representor_id = mlx5_representor_id_encode(switch_info,
1557 : : eth_da->type);
1558 : : /*
1559 : : * Look for sibling devices in order to reuse their switch domain
1560 : : * if any, otherwise allocate one.
1561 : : */
1562 [ # # ]: 0 : MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1563 : 0 : const struct mlx5_priv *opriv =
1564 : 0 : rte_eth_devices[port_id].data->dev_private;
1565 : :
1566 [ # # ]: 0 : if (!opriv ||
1567 [ # # ]: 0 : opriv->sh != priv->sh ||
1568 [ # # ]: 0 : opriv->domain_id ==
1569 : : RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1570 : : continue;
1571 : 0 : priv->domain_id = opriv->domain_id;
1572 : 0 : DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1573 : : priv->dev_port, priv->domain_id);
1574 : 0 : break;
1575 : : }
1576 [ # # ]: 0 : if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1577 : 0 : err = rte_eth_switch_domain_alloc(&priv->domain_id);
1578 [ # # ]: 0 : if (err) {
1579 : 0 : err = rte_errno;
1580 : 0 : DRV_LOG(ERR, "unable to allocate switch domain: %s",
1581 : : strerror(rte_errno));
1582 : 0 : goto error;
1583 : : }
1584 : : own_domain_id = 1;
1585 : 0 : DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1586 : : priv->dev_port, priv->domain_id);
1587 : : }
1588 [ # # ]: 0 : if (sh->cdev->config.devx) {
1589 : : struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
1590 : :
1591 : 0 : sh->steering_format_version = hca_attr->steering_format_version;
1592 : : #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
1593 [ # # # # ]: 0 : if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1594 : : sh->config.dv_flow_en) {
1595 [ # # ]: 0 : if (sh->registers.aso_reg != REG_NON) {
1596 : 0 : priv->mtr_en = 1;
1597 : 0 : priv->mtr_reg_share = hca_attr->qos.flow_meter;
1598 : : }
1599 : : }
1600 [ # # ]: 0 : if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1601 : : uint32_t log_obj_size =
1602 : : rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1603 : 0 : if (log_obj_size >=
1604 [ # # ]: 0 : hca_attr->qos.log_meter_aso_granularity &&
1605 : : log_obj_size <=
1606 [ # # ]: 0 : hca_attr->qos.log_meter_aso_max_alloc)
1607 : 0 : sh->meter_aso_en = 1;
1608 : : }
1609 [ # # ]: 0 : if (priv->mtr_en) {
1610 : 0 : err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1611 [ # # ]: 0 : if (err) {
1612 : 0 : err = -err;
1613 : 0 : goto error;
1614 : : }
1615 : : }
1616 [ # # ]: 0 : if (hca_attr->flow.tunnel_header_0_1)
1617 : 0 : sh->tunnel_header_0_1 = 1;
1618 [ # # ]: 0 : if (hca_attr->flow.tunnel_header_2_3)
1619 : 0 : sh->tunnel_header_2_3 = 1;
1620 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
1621 : : #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1622 [ # # # # ]: 0 : if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) {
1623 : 0 : sh->flow_hit_aso_en = 1;
1624 : 0 : err = mlx5_flow_aso_age_mng_init(sh);
1625 [ # # ]: 0 : if (err) {
1626 : 0 : err = -err;
1627 : 0 : goto error;
1628 : : }
1629 : 0 : DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1630 : : }
1631 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1632 : : #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1633 : : defined (HAVE_MLX5_DR_ACTION_ASO_CT)
1634 : : /* HWS create CT ASO SQ based on HWS configure queue number. */
1635 [ # # # # ]: 0 : if (sh->config.dv_flow_en != 2 &&
1636 [ # # ]: 0 : hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) {
1637 : 0 : err = mlx5_flow_aso_ct_mng_init(sh);
1638 [ # # ]: 0 : if (err) {
1639 : 0 : err = -err;
1640 : 0 : goto error;
1641 : : }
1642 : 0 : DRV_LOG(DEBUG, "CT ASO is supported.");
1643 : 0 : sh->ct_aso_en = 1;
1644 : : }
1645 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1646 : : #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1647 [ # # # # ]: 0 : if (hca_attr->log_max_ft_sampler_num > 0 &&
1648 : : sh->config.dv_flow_en) {
1649 : 0 : priv->sampler_en = 1;
1650 : 0 : DRV_LOG(DEBUG, "Sampler enabled!");
1651 : : } else {
1652 : 0 : priv->sampler_en = 0;
1653 [ # # ]: 0 : if (!hca_attr->log_max_ft_sampler_num)
1654 : 0 : DRV_LOG(WARNING,
1655 : : "No available register for sampler.");
1656 : : else
1657 : 0 : DRV_LOG(DEBUG, "DV flow is not supported!");
1658 : : }
1659 : : #endif
1660 [ # # ]: 0 : if (hca_attr->lag_rx_port_affinity) {
1661 : 0 : sh->lag_rx_port_affinity_en = 1;
1662 : 0 : DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled");
1663 : : }
1664 : 0 : priv->num_lag_ports = hca_attr->num_lag_ports;
1665 : 0 : DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports);
1666 : : }
1667 : : /* Process parameters and store port configuration on priv structure. */
1668 : 0 : err = mlx5_port_args_config(priv, mkvlist, &priv->config);
1669 [ # # ]: 0 : if (err) {
1670 : 0 : err = rte_errno;
1671 : 0 : DRV_LOG(ERR, "Failed to process port configure: %s",
1672 : : strerror(rte_errno));
1673 : 0 : goto error;
1674 : : }
1675 : 0 : eth_dev = rte_eth_dev_allocate(name);
1676 [ # # ]: 0 : if (eth_dev == NULL) {
1677 : 0 : DRV_LOG(ERR, "can not allocate rte ethdev");
1678 : : err = ENOMEM;
1679 : 0 : goto error;
1680 : : }
1681 : 0 : priv->port_info.type = spawn->info.name_type;
1682 : 0 : priv->port_info.ctrl_num = spawn->info.ctrl_num;
1683 : 0 : priv->port_info.pf_num = spawn->info.pf_num;
1684 : 0 : priv->port_info.port_num = spawn->info.port_name;
1685 [ # # ]: 0 : if (priv->representor) {
1686 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1687 : 0 : eth_dev->data->representor_id = eth_dev->data->port_id;
1688 [ # # ]: 0 : MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1689 : 0 : struct mlx5_priv *opriv =
1690 : 0 : rte_eth_devices[port_id].data->dev_private;
1691 [ # # # # ]: 0 : if (opriv &&
1692 : 0 : opriv->master &&
1693 [ # # ]: 0 : opriv->domain_id == priv->domain_id &&
1694 [ # # ]: 0 : opriv->sh == priv->sh) {
1695 : 0 : eth_dev->data->backer_port_id = port_id;
1696 : 0 : break;
1697 : : }
1698 : : }
1699 [ # # ]: 0 : if (port_id >= RTE_MAX_ETHPORTS)
1700 : 0 : eth_dev->data->backer_port_id = eth_dev->data->port_id;
1701 : : }
1702 : 0 : priv->mp_id.port_id = eth_dev->data->port_id;
1703 : 0 : strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1704 : : /*
1705 : : * Store associated network device interface index. This index
1706 : : * is permanent throughout the lifetime of device. So, we may store
1707 : : * the ifindex here and use the cached value further.
1708 : : */
1709 : : MLX5_ASSERT(spawn->ifindex);
1710 : 0 : priv->if_index = spawn->ifindex;
1711 : 0 : priv->lag_affinity_idx = sh->refcnt - 1;
1712 : 0 : eth_dev->data->dev_private = priv;
1713 : 0 : priv->dev_data = eth_dev->data;
1714 : 0 : eth_dev->data->mac_addrs = priv->mac;
1715 : 0 : eth_dev->device = dpdk_dev;
1716 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1717 : : /* Fetch minimum and maximum allowed MTU from the device. */
1718 : 0 : mlx5_get_mtu_bounds(eth_dev, &priv->min_mtu, &priv->max_mtu);
1719 : : /* Configure the first MAC address by default. */
1720 [ # # ]: 0 : if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1721 : 0 : DRV_LOG(ERR,
1722 : : "port %u cannot get MAC address, is mlx5_en"
1723 : : " loaded? (errno: %s)",
1724 : : eth_dev->data->port_id, strerror(rte_errno));
1725 : : err = ENODEV;
1726 : 0 : goto error;
1727 : : }
1728 : 0 : DRV_LOG(INFO,
1729 : : "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1730 : : eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1731 : : #ifdef RTE_PMD_MLX5_DEBUG
1732 : : {
1733 : : char ifname[MLX5_NAMESIZE];
1734 : :
1735 : : if (mlx5_get_ifname(eth_dev, ifname) == 0)
1736 : : DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1737 : : eth_dev->data->port_id, ifname);
1738 : : else
1739 : : DRV_LOG(DEBUG, "port %u ifname is unknown",
1740 : : eth_dev->data->port_id);
1741 : : }
1742 : : #endif
1743 : : /* Get actual MTU if possible. */
1744 : 0 : err = mlx5_get_mtu(eth_dev, ð_dev->data->mtu);
1745 [ # # ]: 0 : if (err) {
1746 : 0 : err = rte_errno;
1747 : 0 : goto error;
1748 : : }
1749 : 0 : DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1750 : : eth_dev->data->mtu);
1751 : : /* Initialize burst functions to prevent crashes before link-up. */
1752 : 0 : eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1753 : 0 : eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1754 : 0 : eth_dev->dev_ops = &mlx5_dev_ops;
1755 : 0 : eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1756 : 0 : eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1757 : 0 : eth_dev->rx_queue_count = mlx5_rx_queue_count;
1758 : : /* Register MAC address. */
1759 : 0 : claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1760 : : /* Sync mac addresses for PF or VF/SF if vf_nl_en is true */
1761 [ # # # # ]: 0 : if ((!sh->dev_cap.vf && !sh->dev_cap.sf) || sh->config.vf_nl_en)
1762 : 0 : mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1763 : : mlx5_ifindex(eth_dev),
1764 : 0 : eth_dev->data->mac_addrs,
1765 : : MLX5_MAX_MAC_ADDRESSES);
1766 [ # # ]: 0 : priv->ctrl_flows = 0;
1767 : : rte_spinlock_init(&priv->flow_list_lock);
1768 : 0 : TAILQ_INIT(&priv->flow_meters);
1769 [ # # ]: 0 : if (priv->mtr_en) {
1770 : 0 : priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1771 [ # # ]: 0 : if (!priv->mtr_profile_tbl)
1772 : 0 : goto error;
1773 : : }
1774 : : /* Bring Ethernet device up. */
1775 : 0 : DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1776 : : eth_dev->data->port_id);
1777 : : /* Read link status in case it is up and there will be no event. */
1778 : 0 : mlx5_link_update(eth_dev, 0);
1779 : : /* Watch LSC interrupts between port probe and port start. */
1780 : 0 : priv->sh->port[priv->dev_port - 1].nl_ih_port_id = eth_dev->data->port_id;
1781 : 0 : mlx5_set_link_up(eth_dev);
1782 [ # # ]: 0 : for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1783 : 0 : icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1784 [ # # ]: 0 : if (sh->config.reclaim_mode)
1785 : 0 : icfg[i].per_core_cache = 0;
1786 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1787 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2) {
1788 : : icfg[i].size = sizeof(struct rte_flow_hw) + sizeof(struct rte_flow_nt2hws);
1789 : 0 : icfg[i].size += sizeof(struct rte_flow_hw_aux);
1790 : : }
1791 : : #endif
1792 : 0 : priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1793 [ # # ]: 0 : if (!priv->flows[i])
1794 : 0 : goto error;
1795 : : }
1796 : : /* Create context for virtual machine VLAN workaround. */
1797 [ # # ]: 0 : priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1798 [ # # ]: 0 : if (mlx5_devx_obj_ops_en(sh)) {
1799 : 0 : priv->obj_ops = mlx5_devx_obj_ops;
1800 : 0 : mlx5_queue_counter_id_prepare(eth_dev);
1801 : 0 : priv->obj_ops.lb_dummy_queue_create =
1802 : : mlx5_rxq_ibv_obj_dummy_lb_create;
1803 : 0 : priv->obj_ops.lb_dummy_queue_release =
1804 : : mlx5_rxq_ibv_obj_dummy_lb_release;
1805 [ # # ]: 0 : } else if (spawn->max_port > UINT8_MAX) {
1806 : : /* Verbs can't support ports larger than 255 by design. */
1807 : 0 : DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1808 : : err = ENOTSUP;
1809 : 0 : goto error;
1810 : : } else {
1811 : 0 : priv->obj_ops = mlx5_ibv_obj_ops;
1812 : : }
1813 [ # # ]: 0 : if (sh->config.tx_pp &&
1814 [ # # ]: 0 : priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1815 : : /*
1816 : : * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1817 : : * packet pacing and already checked above.
1818 : : * Hence, we should only make sure the SQs will be created
1819 : : * with DevX, not with Verbs.
1820 : : * Verbs allocates the SQ UAR on its own and it can't be shared
1821 : : * with Clock Queue UAR as required for Tx scheduling.
1822 : : */
1823 : 0 : DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1824 : : err = ENODEV;
1825 : 0 : goto error;
1826 : : }
1827 : 0 : priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1828 [ # # ]: 0 : if (!priv->drop_queue.hrxq)
1829 : 0 : goto error;
1830 : 0 : priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1831 : : mlx5_hrxq_create_cb,
1832 : : mlx5_hrxq_match_cb,
1833 : : mlx5_hrxq_remove_cb,
1834 : : mlx5_hrxq_clone_cb,
1835 : : mlx5_hrxq_clone_free_cb);
1836 [ # # ]: 0 : if (!priv->hrxqs)
1837 : 0 : goto error;
1838 : 0 : mlx5_set_metadata_mask(eth_dev);
1839 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1840 [ # # ]: 0 : !priv->sh->dv_regc0_mask) {
1841 : 0 : DRV_LOG(ERR, "metadata mode %u is not supported "
1842 : : "(no metadata reg_c[0] is available)",
1843 : : sh->config.dv_xmeta_en);
1844 : : err = ENOTSUP;
1845 : 0 : goto error;
1846 : : }
1847 : : rte_rwlock_init(&priv->ind_tbls_lock);
1848 [ # # ]: 0 : if (sh->config.dv_flow_en) {
1849 : 0 : err = mlx5_alloc_shared_dr(eth_dev);
1850 [ # # ]: 0 : if (err)
1851 : 0 : goto error;
1852 [ # # ]: 0 : if (mlx5_flex_item_port_init(eth_dev) < 0)
1853 : 0 : goto error;
1854 : : }
1855 [ # # ]: 0 : if (sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_UNKNOWN) {
1856 : 0 : sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_OK;
1857 [ # # ]: 0 : if (!sh->cdev->config.hca_attr.modify_outer_ipv6_traffic_class ||
1858 [ # # # # ]: 0 : (sh->config.dv_flow_en == 1 && mlx5_flow_discover_ipv6_tc_support(eth_dev)))
1859 : 0 : sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_FALLBACK;
1860 : : }
1861 : : rte_spinlock_init(&priv->hw_ctrl_lock);
1862 : 0 : LIST_INIT(&priv->hw_ctrl_flows);
1863 : 0 : LIST_INIT(&priv->hw_ext_ctrl_flows);
1864 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2) {
1865 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1866 : : /*
1867 : : * Unified FDB flag is only needed for the actions created on the transfer
1868 : : * port. proxy port. It is not needed on the following ports:
1869 : : * 1. NIC PF / VF / SF
1870 : : * 2. in Verbs or DV/DR mode
1871 : : * 3. with unsupported FW
1872 : : * 4. all representors in HWS
1873 : : */
1874 [ # # ]: 0 : priv->unified_fdb_en = sh->cdev->config.hca_attr.fdb_unified_en &&
1875 [ # # ]: 0 : priv->master &&
1876 [ # # ]: 0 : priv->vport_meta_mask != 0;
1877 : : /* Jump FDB Rx works only with unified FDB enabled. */
1878 [ # # ]: 0 : if (priv->unified_fdb_en)
1879 : 0 : priv->jump_fdb_rx_en = sh->cdev->config.hca_attr.jump_fdb_rx_en;
1880 [ # # # # ]: 0 : DRV_LOG(DEBUG, "port %u: unified FDB %s enabled, jump_fdb_rx %s enabled.",
1881 : : eth_dev->data->port_id,
1882 : : priv->unified_fdb_en ? "is" : "isn't",
1883 : : priv->jump_fdb_rx_en ? "is" : "isn't");
1884 : : /* Without vport metadata, PMD must rely on source_vport match. */
1885 [ # # # # ]: 0 : if (priv->sh->config.dv_esw_en && priv->vport_meta_mask == 0)
1886 : 0 : priv->vport_match = 1;
1887 [ # # ]: 0 : if (priv->sh->config.dv_esw_en)
1888 : 0 : mlx5_flow_hw_set_port_info(eth_dev);
1889 [ # # ]: 0 : if (priv->sh->config.dv_esw_en &&
1890 [ # # # # ]: 0 : priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1891 : : priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) {
1892 : 0 : DRV_LOG(ERR,
1893 : : "metadata mode %u is not supported in HWS eswitch mode",
1894 : : priv->sh->config.dv_xmeta_en);
1895 : : err = ENOTSUP;
1896 : 0 : goto error;
1897 : : }
1898 [ # # # # ]: 0 : if (priv->sh->config.dv_esw_en &&
1899 : 0 : mlx5_flow_hw_create_vport_action(eth_dev)) {
1900 : 0 : DRV_LOG(ERR, "port %u failed to create vport action",
1901 : : eth_dev->data->port_id);
1902 : : err = EINVAL;
1903 : 0 : goto error;
1904 : : }
1905 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1906 : 0 : return eth_dev;
1907 : : #else
1908 : : DRV_LOG(ERR, "DV support is missing for HWS.");
1909 : : goto error;
1910 : : #endif
1911 : : }
1912 [ # # ]: 0 : if (!priv->sh->flow_priority_check_flag) {
1913 : : /* Supported Verbs flow priority number detection. */
1914 : 0 : err = mlx5_flow_discover_priorities(eth_dev);
1915 : 0 : priv->sh->flow_max_priority = err;
1916 : 0 : priv->sh->flow_priority_check_flag = 1;
1917 : : } else {
1918 : 0 : err = priv->sh->flow_max_priority;
1919 : : }
1920 [ # # ]: 0 : if (err < 0) {
1921 : 0 : err = -err;
1922 : 0 : goto error;
1923 : : }
1924 : : rte_spinlock_init(&priv->shared_act_sl);
1925 : 0 : mlx5_flow_counter_mode_config(eth_dev);
1926 : 0 : mlx5_flow_drop_action_config(eth_dev);
1927 [ # # ]: 0 : if (sh->config.dv_flow_en)
1928 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1929 : : return eth_dev;
1930 : 0 : error:
1931 [ # # ]: 0 : if (priv) {
1932 : 0 : priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
1933 : : RTE_MAX_ETHPORTS;
1934 : 0 : rte_io_wmb();
1935 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1936 [ # # ]: 0 : if (eth_dev &&
1937 [ # # ]: 0 : priv->sh &&
1938 [ # # ]: 0 : priv->sh->config.dv_flow_en == 2 &&
1939 : : priv->sh->config.dv_esw_en)
1940 : 0 : mlx5_flow_hw_destroy_vport_action(eth_dev);
1941 : : #endif
1942 [ # # ]: 0 : if (priv->sh)
1943 : 0 : mlx5_os_free_shared_dr(priv);
1944 [ # # ]: 0 : if (priv->nl_socket_route >= 0)
1945 : 0 : close(priv->nl_socket_route);
1946 [ # # ]: 0 : if (priv->vmwa_context)
1947 : 0 : mlx5_vlan_vmwa_exit(priv->vmwa_context);
1948 [ # # ]: 0 : for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1949 [ # # ]: 0 : if (!priv->flows[i])
1950 : 0 : continue;
1951 : 0 : mlx5_ipool_destroy(priv->flows[i]);
1952 : : }
1953 [ # # # # ]: 0 : if (eth_dev && priv->drop_queue.hrxq)
1954 : 0 : mlx5_drop_action_destroy(eth_dev);
1955 [ # # ]: 0 : if (priv->mtr_profile_tbl)
1956 : 0 : mlx5_l3t_destroy(priv->mtr_profile_tbl);
1957 [ # # ]: 0 : if (own_domain_id)
1958 : 0 : claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1959 [ # # ]: 0 : if (priv->hrxqs)
1960 : 0 : mlx5_list_destroy(priv->hrxqs);
1961 [ # # # # ]: 0 : if (eth_dev && priv->flex_item_map)
1962 : 0 : mlx5_flex_item_port_cleanup(eth_dev);
1963 : 0 : mlx5_free(priv->ext_rxqs);
1964 : 0 : mlx5_free(priv->ext_txqs);
1965 : 0 : mlx5_free(priv);
1966 [ # # ]: 0 : if (eth_dev != NULL)
1967 : 0 : eth_dev->data->dev_private = NULL;
1968 : : }
1969 [ # # ]: 0 : if (eth_dev != NULL) {
1970 : : /* mac_addrs must not be freed alone because part of
1971 : : * dev_private
1972 : : **/
1973 : 0 : eth_dev->data->mac_addrs = NULL;
1974 : 0 : rte_eth_dev_release_port(eth_dev);
1975 : : }
1976 : : if (sh)
1977 : 0 : mlx5_free_shared_dev_ctx(sh);
1978 [ # # ]: 0 : if (nl_rdma >= 0)
1979 : 0 : close(nl_rdma);
1980 : : MLX5_ASSERT(err > 0);
1981 : 0 : rte_errno = err;
1982 : 0 : return NULL;
1983 : : }
1984 : :
1985 : : /**
1986 : : * Comparison callback to sort device data.
1987 : : *
1988 : : * This is meant to be used with qsort().
1989 : : *
1990 : : * @param a[in]
1991 : : * Pointer to pointer to first data object.
1992 : : * @param b[in]
1993 : : * Pointer to pointer to second data object.
1994 : : *
1995 : : * @return
1996 : : * 0 if both objects are equal, less than 0 if the first argument is less
1997 : : * than the second, greater than 0 otherwise.
1998 : : */
1999 : : static int
2000 : 0 : mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2001 : : {
2002 : : const struct mlx5_switch_info *si_a =
2003 : : &((const struct mlx5_dev_spawn_data *)a)->info;
2004 : : const struct mlx5_switch_info *si_b =
2005 : : &((const struct mlx5_dev_spawn_data *)b)->info;
2006 : 0 : int uplink_a = si_a->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
2007 : 0 : int uplink_b = si_b->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
2008 : : int ret;
2009 : :
2010 : : /* Uplink ports first. */
2011 : 0 : ret = uplink_b - uplink_a;
2012 [ # # ]: 0 : if (ret)
2013 : : return ret;
2014 : : /* Then master devices. */
2015 : 0 : ret = si_b->master - si_a->master;
2016 [ # # ]: 0 : if (ret)
2017 : : return ret;
2018 : : /* Then representor devices. */
2019 : 0 : ret = si_b->representor - si_a->representor;
2020 [ # # ]: 0 : if (ret)
2021 : : return ret;
2022 : : /* Unidentified devices come last in no specific order. */
2023 [ # # ]: 0 : if (!si_a->representor)
2024 : : return 0;
2025 : : /* Order representors by name. */
2026 : 0 : return si_a->port_name - si_b->port_name;
2027 : : }
2028 : :
2029 : : /**
2030 : : * Match PCI information for possible slaves of bonding device.
2031 : : *
2032 : : * @param[in] ibdev
2033 : : * Pointer to IB device.
2034 : : * @param[in] pci_dev
2035 : : * Pointer to primary PCI address structure to match.
2036 : : * @param[in] nl_rdma
2037 : : * Netlink RDMA group socket handle.
2038 : : * @param[in] owner
2039 : : * Representor owner PF index.
2040 : : * @param[in] dev_info
2041 : : * Cached mlx5 device information.
2042 : : * @param[out] bond_info
2043 : : * Pointer to bonding information.
2044 : : *
2045 : : * @return
2046 : : * negative value if no bonding device found, otherwise
2047 : : * positive index of slave PF in bonding.
2048 : : */
2049 : : static int
2050 : 0 : mlx5_device_bond_pci_match(const struct ibv_device *ibdev,
2051 : : const struct rte_pci_addr *pci_dev,
2052 : : int nl_rdma, uint16_t owner,
2053 : : struct mlx5_dev_info *dev_info,
2054 : : struct mlx5_bond_info *bond_info)
2055 : : {
2056 : : char ifname[IF_NAMESIZE + 1];
2057 : : unsigned int ifindex;
2058 : : unsigned int np, i;
2059 : : FILE *bond_file = NULL, *file;
2060 : : int pf = -1;
2061 : : int ret;
2062 : 0 : uint8_t cur_guid[32] = {0};
2063 [ # # ]: 0 : uint8_t guid[32] = {0};
2064 : :
2065 : : /*
2066 : : * Try to get master device name. If something goes wrong suppose
2067 : : * the lack of kernel support and no bonding devices.
2068 : : */
2069 : : memset(bond_info, 0, sizeof(*bond_info));
2070 [ # # ]: 0 : if (nl_rdma < 0)
2071 : : return -1;
2072 [ # # ]: 0 : if (!mlx5_os_is_device_bond(ibdev))
2073 : : return -1;
2074 : 0 : np = mlx5_nl_portnum(nl_rdma, ibdev->name, dev_info);
2075 [ # # ]: 0 : if (!np)
2076 : : return -1;
2077 [ # # ]: 0 : if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
2078 : : return -1;
2079 : : /*
2080 : : * The master device might not be on the predefined port(not on port
2081 : : * index 1, it is not guaranteed), we have to scan all Infiniband
2082 : : * device ports and find master.
2083 : : */
2084 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2085 : : /* Check whether Infiniband port is populated. */
2086 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibdev->name, i, dev_info);
2087 [ # # ]: 0 : if (!ifindex)
2088 : 0 : continue;
2089 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2090 : 0 : continue;
2091 : : /* Try to read bonding slave names from sysfs. */
2092 : 0 : MKSTR(slaves,
2093 : : "/sys/class/net/%s/master/bonding/slaves", ifname);
2094 : 0 : bond_file = fopen(slaves, "r");
2095 [ # # ]: 0 : if (bond_file)
2096 : : break;
2097 : : }
2098 [ # # ]: 0 : if (!bond_file)
2099 : : return -1;
2100 : : /* Use safe format to check maximal buffer length. */
2101 : : MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2102 [ # # ]: 0 : while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2103 : : char tmp_str[IF_NAMESIZE + 32];
2104 : : struct rte_pci_addr pci_addr;
2105 : : struct mlx5_switch_info info;
2106 : : int ret;
2107 : :
2108 : : /* Process slave interface names in the loop. */
2109 : : snprintf(tmp_str, sizeof(tmp_str),
2110 : : "/sys/class/net/%s", ifname);
2111 [ # # ]: 0 : if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
2112 : 0 : DRV_LOG(WARNING,
2113 : : "Cannot get PCI address for netdev \"%s\".",
2114 : : ifname);
2115 : 0 : continue;
2116 : : }
2117 : : /* Slave interface PCI address match found. */
2118 : : snprintf(tmp_str, sizeof(tmp_str),
2119 : : "/sys/class/net/%s/phys_port_name", ifname);
2120 : 0 : file = fopen(tmp_str, "rb");
2121 [ # # ]: 0 : if (!file)
2122 : : break;
2123 : 0 : info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2124 [ # # ]: 0 : if (fscanf(file, "%32s", tmp_str) == 1) {
2125 : 0 : mlx5_translate_port_name(tmp_str, &info);
2126 : 0 : fclose(file);
2127 : : } else {
2128 : 0 : fclose(file);
2129 : 0 : break;
2130 : : }
2131 : : /* Only process PF ports. */
2132 [ # # ]: 0 : if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2133 : : info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2134 : 0 : continue;
2135 : : /* Check max bonding member. */
2136 [ # # ]: 0 : if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2137 : 0 : DRV_LOG(WARNING, "bonding index out of range, "
2138 : : "please increase MLX5_BOND_MAX_PORTS: %s",
2139 : : tmp_str);
2140 : 0 : break;
2141 : : }
2142 : : /* Get ifindex. */
2143 : : snprintf(tmp_str, sizeof(tmp_str),
2144 : : "/sys/class/net/%s/ifindex", ifname);
2145 : 0 : file = fopen(tmp_str, "rb");
2146 [ # # ]: 0 : if (!file)
2147 : : break;
2148 : 0 : ret = fscanf(file, "%u", &ifindex);
2149 : 0 : fclose(file);
2150 [ # # ]: 0 : if (ret != 1)
2151 : : break;
2152 : : /* Save bonding info. */
2153 : 0 : snprintf(bond_info->ports[info.port_name].ifname,
2154 : : sizeof(bond_info->ports[0].ifname), "%s", ifname);
2155 : 0 : bond_info->ports[info.port_name].pci_addr = pci_addr;
2156 : 0 : bond_info->ports[info.port_name].ifindex = ifindex;
2157 : 0 : bond_info->n_port++;
2158 : : /*
2159 : : * Under socket direct mode, bonding will use
2160 : : * system_image_guid as identification.
2161 : : * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
2162 : : * All bonding members should have the same guid even if driver
2163 : : * is using PCIe BDF.
2164 : : */
2165 : 0 : ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
2166 [ # # ]: 0 : if (ret < 0)
2167 : : break;
2168 [ # # ]: 0 : else if (ret > 0) {
2169 [ # # ]: 0 : if (!memcmp(guid, cur_guid, sizeof(guid)) &&
2170 [ # # # # ]: 0 : owner == info.port_name &&
2171 [ # # ]: 0 : (owner != 0 || (owner == 0 &&
2172 : 0 : !rte_pci_addr_cmp(pci_dev, &pci_addr))))
2173 : 0 : pf = info.port_name;
2174 [ # # ]: 0 : } else if (pci_dev->domain == pci_addr.domain &&
2175 [ # # ]: 0 : pci_dev->bus == pci_addr.bus &&
2176 : 0 : pci_dev->devid == pci_addr.devid &&
2177 [ # # ]: 0 : ((pci_dev->function == 0 &&
2178 [ # # ]: 0 : pci_dev->function + owner == pci_addr.function) ||
2179 [ # # ]: 0 : (pci_dev->function == owner &&
2180 [ # # ]: 0 : pci_addr.function == owner)))
2181 : 0 : pf = info.port_name;
2182 : : }
2183 : 0 : fclose(bond_file);
2184 [ # # ]: 0 : if (pf >= 0) {
2185 : : /* Get bond interface info */
2186 : 0 : ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2187 : 0 : bond_info->ifname);
2188 [ # # ]: 0 : if (ret)
2189 : 0 : DRV_LOG(ERR, "unable to get bond info: %s",
2190 : : strerror(rte_errno));
2191 : : else
2192 : 0 : DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2193 : : ifindex, bond_info->ifindex, bond_info->ifname);
2194 : : }
2195 [ # # ]: 0 : if (owner == 0 && pf != 0) {
2196 : 0 : DRV_LOG(INFO, "PCIe instance " PCI_PRI_FMT " isn't bonding owner",
2197 : : pci_dev->domain, pci_dev->bus, pci_dev->devid,
2198 : : pci_dev->function);
2199 : : }
2200 : : return pf;
2201 : : }
2202 : :
2203 : : static int
2204 : 0 : mlx5_nl_esw_multiport_get(struct rte_pci_addr *pci_addr, int *enabled)
2205 : : {
2206 : 0 : char pci_addr_str[PCI_PRI_STR_SIZE] = { 0 };
2207 : : int nlsk_fd;
2208 : : int devlink_id;
2209 : : int ret;
2210 : :
2211 : : /* Provide correct value to have defined enabled state in case of an error. */
2212 : 0 : *enabled = 0;
2213 : 0 : rte_pci_device_name(pci_addr, pci_addr_str, sizeof(pci_addr_str));
2214 : 0 : nlsk_fd = mlx5_nl_init(NETLINK_GENERIC, 0);
2215 [ # # ]: 0 : if (nlsk_fd < 0)
2216 : : return nlsk_fd;
2217 : 0 : devlink_id = mlx5_nl_devlink_family_id_get(nlsk_fd);
2218 [ # # ]: 0 : if (devlink_id < 0) {
2219 : : ret = devlink_id;
2220 : 0 : DRV_LOG(DEBUG, "Unable to get devlink family id for Multiport E-Switch checks "
2221 : : "by netlink, for PCI device %s", pci_addr_str);
2222 : 0 : goto close_nlsk_fd;
2223 : : }
2224 : 0 : ret = mlx5_nl_devlink_esw_multiport_get(nlsk_fd, devlink_id, pci_addr_str, enabled);
2225 [ # # ]: 0 : if (ret < 0)
2226 : 0 : DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by Netlink.");
2227 : 0 : close_nlsk_fd:
2228 : 0 : close(nlsk_fd);
2229 : 0 : return ret;
2230 : : }
2231 : :
2232 : : #define SYSFS_MPESW_PARAM_MAX_LEN 16
2233 : :
2234 : : static int
2235 : 0 : mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled,
2236 : : struct mlx5_dev_info *dev_info)
2237 : : {
2238 : : int nl_rdma;
2239 : : unsigned int n_ports;
2240 : : unsigned int i;
2241 : : int ret;
2242 : :
2243 : : /* Provide correct value to have defined enabled state in case of an error. */
2244 : 0 : *enabled = 0;
2245 : 0 : nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2246 [ # # ]: 0 : if (nl_rdma < 0)
2247 : : return nl_rdma;
2248 : 0 : n_ports = mlx5_nl_portnum(nl_rdma, ibv->name, dev_info);
2249 [ # # ]: 0 : if (!n_ports) {
2250 : 0 : ret = -rte_errno;
2251 : 0 : goto close_nl_rdma;
2252 : : }
2253 [ # # ]: 0 : for (i = 1; i <= n_ports; ++i) {
2254 : : unsigned int ifindex;
2255 : : char ifname[IF_NAMESIZE + 1];
2256 : 0 : struct rte_pci_addr if_pci_addr = { 0 };
2257 : : char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1];
2258 : : FILE *sysfs;
2259 : : int n;
2260 : :
2261 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i, dev_info);
2262 [ # # ]: 0 : if (!ifindex)
2263 : 0 : continue;
2264 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2265 : 0 : continue;
2266 : 0 : MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname);
2267 [ # # ]: 0 : if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr))
2268 : 0 : continue;
2269 [ # # ]: 0 : if (pci_addr->domain != if_pci_addr.domain ||
2270 [ # # ]: 0 : pci_addr->bus != if_pci_addr.bus ||
2271 : 0 : pci_addr->devid != if_pci_addr.devid ||
2272 [ # # ]: 0 : pci_addr->function != if_pci_addr.function)
2273 : 0 : continue;
2274 : 0 : MKSTR(sysfs_mpesw_path,
2275 : : "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname);
2276 : 0 : sysfs = fopen(sysfs_mpesw_path, "r");
2277 [ # # ]: 0 : if (!sysfs)
2278 : 0 : continue;
2279 : 0 : n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw);
2280 : 0 : fclose(sysfs);
2281 [ # # ]: 0 : if (n != 1)
2282 : 0 : continue;
2283 : : ret = 0;
2284 [ # # ]: 0 : if (strcmp(mpesw, "multiport_esw") == 0) {
2285 : 0 : *enabled = 1;
2286 : 0 : break;
2287 : : }
2288 : 0 : *enabled = 0;
2289 : 0 : break;
2290 : : }
2291 [ # # ]: 0 : if (i > n_ports) {
2292 : 0 : DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs.");
2293 : 0 : rte_errno = ENOENT;
2294 : : ret = -rte_errno;
2295 : : }
2296 : :
2297 : 0 : close_nl_rdma:
2298 : 0 : close(nl_rdma);
2299 : 0 : return ret;
2300 : : }
2301 : :
2302 : : static int
2303 : 0 : mlx5_is_mpesw_enabled(struct ibv_device *ibv, struct rte_pci_addr *ibv_pci_addr, int *enabled,
2304 : : struct mlx5_dev_info *dev_info)
2305 : : {
2306 : : /*
2307 : : * Try getting Multiport E-Switch state through netlink interface
2308 : : * If unable, try sysfs interface. If that is unable as well,
2309 : : * assume that Multiport E-Switch is disabled and return an error.
2310 : : */
2311 [ # # # # ]: 0 : if (mlx5_nl_esw_multiport_get(ibv_pci_addr, enabled) >= 0 ||
2312 : 0 : mlx5_sysfs_esw_multiport_get(ibv, ibv_pci_addr, enabled, dev_info) >= 0)
2313 : 0 : return 0;
2314 : 0 : DRV_LOG(DEBUG, "Unable to check MPESW state for IB device %s "
2315 : : "(PCI: " PCI_PRI_FMT ")",
2316 : : ibv->name,
2317 : : ibv_pci_addr->domain, ibv_pci_addr->bus,
2318 : : ibv_pci_addr->devid, ibv_pci_addr->function);
2319 : 0 : *enabled = 0;
2320 : 0 : return -rte_errno;
2321 : : }
2322 : :
2323 : : static int
2324 : 0 : mlx5_device_mpesw_pci_match(struct ibv_device *ibv,
2325 : : const struct rte_pci_addr *owner_pci,
2326 : : int nl_rdma, struct mlx5_dev_info *dev_info)
2327 : : {
2328 : 0 : struct rte_pci_addr ibdev_pci_addr = { 0 };
2329 : 0 : char ifname[IF_NAMESIZE + 1] = { 0 };
2330 : : unsigned int ifindex;
2331 : : unsigned int np;
2332 : : unsigned int i;
2333 : 0 : int enabled = 0;
2334 : : int ret;
2335 : :
2336 : : /* Check if IB device's PCI address matches the probed PCI address. */
2337 [ # # ]: 0 : if (mlx5_get_pci_addr(ibv->ibdev_path, &ibdev_pci_addr)) {
2338 : 0 : DRV_LOG(DEBUG, "Skipping MPESW check for IB device %s since "
2339 : : "there is no underlying PCI device", ibv->name);
2340 : 0 : rte_errno = ENOENT;
2341 : 0 : return -rte_errno;
2342 : : }
2343 [ # # ]: 0 : if (ibdev_pci_addr.domain != owner_pci->domain ||
2344 [ # # ]: 0 : ibdev_pci_addr.bus != owner_pci->bus ||
2345 : 0 : ibdev_pci_addr.devid != owner_pci->devid ||
2346 [ # # ]: 0 : ibdev_pci_addr.function != owner_pci->function) {
2347 : : return -1;
2348 : : }
2349 : : /* Check if IB device has MPESW enabled. */
2350 [ # # ]: 0 : if (mlx5_is_mpesw_enabled(ibv, &ibdev_pci_addr, &enabled, dev_info))
2351 : : return -1;
2352 [ # # ]: 0 : if (!enabled)
2353 : : return -1;
2354 : : /* Iterate through IB ports to find MPESW master uplink port. */
2355 [ # # ]: 0 : if (nl_rdma < 0)
2356 : : return -1;
2357 : 0 : np = mlx5_nl_portnum(nl_rdma, ibv->name, dev_info);
2358 [ # # ]: 0 : if (!np)
2359 : : return -1;
2360 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2361 : 0 : struct rte_pci_addr pci_addr = { 0 };
2362 : : FILE *file;
2363 : : char port_name[IF_NAMESIZE + 1];
2364 : : struct mlx5_switch_info info;
2365 : :
2366 : : /* Check whether IB port has a corresponding netdev. */
2367 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i, dev_info);
2368 [ # # ]: 0 : if (!ifindex)
2369 : 0 : continue;
2370 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2371 : 0 : continue;
2372 : : /* Read port name and determine its type. */
2373 : 0 : MKSTR(ifphysportname, "/sys/class/net/%s/phys_port_name", ifname);
2374 : 0 : file = fopen(ifphysportname, "rb");
2375 [ # # ]: 0 : if (!file)
2376 : 0 : continue;
2377 : 0 : ret = fscanf(file, "%16s", port_name);
2378 : 0 : fclose(file);
2379 [ # # ]: 0 : if (ret != 1)
2380 : 0 : continue;
2381 : : memset(&info, 0, sizeof(info));
2382 : 0 : mlx5_translate_port_name(port_name, &info);
2383 [ # # ]: 0 : if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2384 : 0 : continue;
2385 : : /* Fetch PCI address of the device to which the netdev is bound. */
2386 : 0 : MKSTR(ifpath, "/sys/class/net/%s", ifname);
2387 [ # # ]: 0 : if (mlx5_get_pci_addr(ifpath, &pci_addr))
2388 : 0 : continue;
2389 [ # # ]: 0 : if (pci_addr.domain == ibdev_pci_addr.domain &&
2390 : : pci_addr.bus == ibdev_pci_addr.bus &&
2391 [ # # ]: 0 : pci_addr.devid == ibdev_pci_addr.devid &&
2392 : : pci_addr.function == ibdev_pci_addr.function) {
2393 : : MLX5_ASSERT(info.port_name >= 0);
2394 : 0 : return info.port_name;
2395 : : }
2396 : : }
2397 : : /* No matching MPESW uplink port was found. */
2398 : : return -1;
2399 : : }
2400 : :
2401 : : static void
2402 : 0 : calc_nb_uplinks_hpfs(struct ibv_device **ibv_match,
2403 : : unsigned int nd,
2404 : : struct mlx5_dev_spawn_data *list,
2405 : : unsigned int ns)
2406 : : {
2407 [ # # ]: 0 : for (unsigned int i = 0; i != nd; i++) {
2408 : : uint32_t nb_uplinks = 0;
2409 : : uint32_t nb_hpfs = 0;
2410 : : uint32_t j;
2411 : :
2412 [ # # ]: 0 : for (unsigned int j = 0; j != ns; j++) {
2413 [ # # ]: 0 : if (strcmp(ibv_match[i]->name, list[j].phys_dev_name) != 0)
2414 : 0 : continue;
2415 : :
2416 [ # # ]: 0 : if (list[j].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2417 : 0 : nb_uplinks++;
2418 [ # # ]: 0 : else if (list[j].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF)
2419 : 0 : nb_hpfs++;
2420 : : }
2421 : :
2422 [ # # ]: 0 : if (nb_uplinks > 0 || nb_hpfs > 0) {
2423 [ # # ]: 0 : for (j = 0; j != ns; j++) {
2424 [ # # ]: 0 : if (strcmp(ibv_match[i]->name, list[j].phys_dev_name) != 0)
2425 : 0 : continue;
2426 : :
2427 : 0 : list[j].nb_uplinks = nb_uplinks;
2428 : 0 : list[j].nb_hpfs = nb_hpfs;
2429 : : }
2430 : :
2431 : 0 : DRV_LOG(DEBUG, "IB device %s has %u uplinks, %u host PFs",
2432 : : ibv_match[i]->name,
2433 : : nb_uplinks,
2434 : : nb_hpfs);
2435 : : } else {
2436 : 0 : DRV_LOG(DEBUG, "IB device %s unable to recognize uplinks/host PFs",
2437 : : ibv_match[i]->name);
2438 : : }
2439 : : }
2440 : 0 : }
2441 : :
2442 : : /**
2443 : : * Register a PCI device within bonding.
2444 : : *
2445 : : * This function spawns Ethernet devices out of a given PCI device and
2446 : : * bonding owner PF index.
2447 : : *
2448 : : * @param[in] cdev
2449 : : * Pointer to common mlx5 device structure.
2450 : : * @param[in] req_eth_da
2451 : : * Requested ethdev device argument.
2452 : : * @param[in] owner_id
2453 : : * Requested owner PF port ID within bonding device, default to 0.
2454 : : * @param[in, out] mkvlist
2455 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2456 : : *
2457 : : * @return
2458 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2459 : : */
2460 : : static int
2461 : 0 : mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2462 : : struct rte_eth_devargs *req_eth_da,
2463 : : uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)
2464 : 0 : {
2465 : : struct ibv_device **ibv_list;
2466 : : /*
2467 : : * Number of found IB Devices matching with requested PCI BDF.
2468 : : * nd != 1 means there are multiple IB devices over the same
2469 : : * PCI device and we have representors and master.
2470 : : */
2471 : : unsigned int nd = 0;
2472 : : /*
2473 : : * Number of found IB device Ports. nd = 1 and np = 1..n means
2474 : : * we have the single multiport IB device, and there may be
2475 : : * representors attached to some of found ports.
2476 : : */
2477 : : unsigned int np = 0;
2478 : : /*
2479 : : * Number of DPDK ethernet devices to Spawn - either over
2480 : : * multiple IB devices or multiple ports of single IB device.
2481 : : * Actually this is the number of iterations to spawn.
2482 : : */
2483 : : unsigned int ns = 0;
2484 : : /*
2485 : : * Bonding device
2486 : : * < 0 - no bonding device (single one)
2487 : : * >= 0 - bonding device (value is slave PF index)
2488 : : */
2489 : : int bd = -1;
2490 : : /*
2491 : : * Multiport E-Switch (MPESW) device:
2492 : : * < 0 - no MPESW device or could not determine if it is MPESW device,
2493 : : * >= 0 - MPESW device. Value is the port index of the MPESW owner.
2494 : : */
2495 : : int mpesw = MLX5_MPESW_PORT_INVALID;
2496 : 0 : struct rte_pci_device *pci_dev = RTE_BUS_DEVICE(cdev->dev, *pci_dev);
2497 : : struct mlx5_dev_spawn_data *list = NULL;
2498 : 0 : struct rte_eth_devargs eth_da = *req_eth_da;
2499 : 0 : struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2500 : : struct mlx5_bond_info bond_info;
2501 : 0 : int ret = -1;
2502 : :
2503 : 0 : errno = 0;
2504 : 0 : ibv_list = mlx5_glue->get_device_list(&ret);
2505 [ # # ]: 0 : if (!ibv_list) {
2506 [ # # ]: 0 : rte_errno = errno ? errno : ENOSYS;
2507 : 0 : DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2508 : 0 : return -rte_errno;
2509 : : }
2510 : : /*
2511 : : * First scan the list of all Infiniband devices to find
2512 : : * matching ones, gathering into the list.
2513 : : */
2514 : 0 : struct ibv_device *ibv_match[ret + 1];
2515 : 0 : struct mlx5_dev_info *info, tmp_info[ret];
2516 : 0 : int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0);
2517 : 0 : int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2518 : : unsigned int i;
2519 : :
2520 : : memset(tmp_info, 0, sizeof(tmp_info));
2521 [ # # ]: 0 : while (ret-- > 0) {
2522 : : struct rte_pci_addr pci_addr;
2523 : :
2524 [ # # # # ]: 0 : if (cdev->config.probe_opt && cdev->dev_info.port_num) {
2525 [ # # ]: 0 : if (strcmp(ibv_list[ret]->name, cdev->dev_info.ibname)) {
2526 : 0 : DRV_LOG(INFO, "Unmatched caching device \"%s\" \"%s\"",
2527 : : cdev->dev_info.ibname, ibv_list[ret]->name);
2528 : 0 : continue;
2529 : : }
2530 : 0 : info = &cdev->dev_info;
2531 : : } else {
2532 : 0 : info = &tmp_info[ret];
2533 : : }
2534 : 0 : DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2535 : 0 : bd = mlx5_device_bond_pci_match(ibv_list[ret], &owner_pci,
2536 : : nl_rdma, owner_id,
2537 : : info,
2538 : : &bond_info);
2539 [ # # ]: 0 : if (bd >= 0) {
2540 : : /*
2541 : : * Bonding device detected. Only one match is allowed,
2542 : : * the bonding is supported over multi-port IB device,
2543 : : * there should be no matches on representor PCI
2544 : : * functions or non VF LAG bonding devices with
2545 : : * specified address.
2546 : : */
2547 [ # # ]: 0 : if (nd) {
2548 : 0 : DRV_LOG(ERR,
2549 : : "multiple PCI match on bonding device"
2550 : : "\"%s\" found", ibv_list[ret]->name);
2551 : 0 : rte_errno = ENOENT;
2552 : 0 : ret = -rte_errno;
2553 : 0 : goto exit;
2554 : : }
2555 : : /* Amend owner pci address if owner PF ID specified. */
2556 [ # # ]: 0 : if (eth_da.nb_representor_ports)
2557 : 0 : owner_pci.function += owner_id;
2558 : 0 : DRV_LOG(INFO,
2559 : : "PCI information matches for slave %d bonding device \"%s\"",
2560 : : bd, ibv_list[ret]->name);
2561 : 0 : ibv_match[nd++] = ibv_list[ret];
2562 : 0 : break;
2563 : : }
2564 : 0 : mpesw = mlx5_device_mpesw_pci_match(ibv_list[ret], &owner_pci, nl_rdma,
2565 : : info);
2566 [ # # ]: 0 : if (mpesw >= 0) {
2567 : : /*
2568 : : * MPESW device detected. Only one matching IB device is allowed,
2569 : : * so if any matches were found previously, fail gracefully.
2570 : : */
2571 [ # # ]: 0 : if (nd) {
2572 : 0 : DRV_LOG(ERR,
2573 : : "PCI information matches MPESW device \"%s\", "
2574 : : "but multiple matching PCI devices were found. "
2575 : : "Probing failed.",
2576 : : ibv_list[ret]->name);
2577 : 0 : rte_errno = ENOENT;
2578 : 0 : ret = -rte_errno;
2579 : 0 : goto exit;
2580 : : }
2581 : 0 : DRV_LOG(INFO,
2582 : : "PCI information matches MPESW device \"%s\"",
2583 : : ibv_list[ret]->name);
2584 : 0 : ibv_match[nd++] = ibv_list[ret];
2585 : 0 : break;
2586 : : }
2587 : : /* Bonding or MPESW device was not found. */
2588 [ # # ]: 0 : if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2589 : : &pci_addr)) {
2590 [ # # ]: 0 : if (tmp_info[ret].port_info != NULL)
2591 : 0 : mlx5_free(tmp_info[ret].port_info);
2592 : 0 : memset(&tmp_info[ret], 0, sizeof(tmp_info[0]));
2593 : 0 : continue;
2594 : : }
2595 [ # # ]: 0 : if (rte_pci_addr_cmp(&owner_pci, &pci_addr) != 0) {
2596 [ # # ]: 0 : if (tmp_info[ret].port_info != NULL)
2597 : 0 : mlx5_free(tmp_info[ret].port_info);
2598 : 0 : memset(&tmp_info[ret], 0, sizeof(tmp_info[0]));
2599 : 0 : continue;
2600 : : }
2601 : 0 : DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2602 : : ibv_list[ret]->name);
2603 : 0 : ibv_match[nd++] = ibv_list[ret];
2604 : : }
2605 : 0 : ibv_match[nd] = NULL;
2606 [ # # ]: 0 : if (!nd) {
2607 : : /* No device matches, just complain and bail out. */
2608 : 0 : DRV_LOG(WARNING,
2609 : : "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT ","
2610 : : " are kernel drivers loaded?",
2611 : : owner_id, owner_pci.domain, owner_pci.bus,
2612 : : owner_pci.devid, owner_pci.function);
2613 : 0 : rte_errno = ENOENT;
2614 : 0 : ret = -rte_errno;
2615 : 0 : goto exit;
2616 : : }
2617 [ # # ]: 0 : if (nd == 1) {
2618 [ # # ]: 0 : if (!cdev->dev_info.port_num) {
2619 [ # # ]: 0 : for (i = 0; i < RTE_DIM(tmp_info); i++) {
2620 [ # # ]: 0 : if (tmp_info[i].port_num) {
2621 : 0 : cdev->dev_info = tmp_info[i];
2622 : 0 : break;
2623 : : }
2624 : : }
2625 : : }
2626 : : /*
2627 : : * Found single matching device may have multiple ports.
2628 : : * Each port may be representor, we have to check the port
2629 : : * number and check the representors existence.
2630 : : */
2631 [ # # ]: 0 : if (nl_rdma >= 0)
2632 : 0 : np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name, &cdev->dev_info);
2633 [ # # ]: 0 : if (!np)
2634 : 0 : DRV_LOG(WARNING,
2635 : : "Cannot get IB device \"%s\" ports number.",
2636 : : ibv_match[0]->name);
2637 [ # # ]: 0 : if (bd >= 0 && !np) {
2638 : 0 : DRV_LOG(ERR, "Cannot get ports for bonding device.");
2639 : 0 : rte_errno = ENOENT;
2640 : 0 : ret = -rte_errno;
2641 : 0 : goto exit;
2642 : : }
2643 [ # # ]: 0 : if (mpesw >= 0 && !np) {
2644 : 0 : DRV_LOG(ERR, "Cannot get ports for MPESW device.");
2645 : 0 : rte_errno = ENOENT;
2646 : 0 : ret = -rte_errno;
2647 : 0 : goto exit;
2648 : : }
2649 : : } else {
2650 : : /* Can't handle one common device with multiple IB devices caching */
2651 [ # # ]: 0 : for (i = 0; i < RTE_DIM(tmp_info); i++) {
2652 [ # # ]: 0 : if (tmp_info[i].port_info != NULL)
2653 : 0 : mlx5_free(tmp_info[i].port_info);
2654 : 0 : memset(&tmp_info[i], 0, sizeof(tmp_info[0]));
2655 : : }
2656 : 0 : DRV_LOG(INFO, "Cannot handle multiple IB devices info caching in single common device.");
2657 : : }
2658 : : /* Now we can determine the maximal amount of devices to be spawned. */
2659 [ # # ]: 0 : list = mlx5_malloc(MLX5_MEM_ZERO,
2660 : 0 : sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2661 : : RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2662 [ # # ]: 0 : if (!list) {
2663 : 0 : DRV_LOG(ERR, "Spawn data array allocation failure.");
2664 : 0 : rte_errno = ENOMEM;
2665 : 0 : ret = -rte_errno;
2666 : 0 : goto exit;
2667 : : }
2668 [ # # # # ]: 0 : if (bd >= 0 || mpesw >= 0 || np > 1) {
2669 : : /*
2670 : : * Single IB device with multiple ports found,
2671 : : * it may be E-Switch master device and representors.
2672 : : * We have to perform identification through the ports.
2673 : : */
2674 : : MLX5_ASSERT(nl_rdma >= 0);
2675 : : MLX5_ASSERT(ns == 0);
2676 : : MLX5_ASSERT(nd == 1);
2677 : : MLX5_ASSERT(np);
2678 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2679 : 0 : list[ns].bond_info = &bond_info;
2680 : 0 : list[ns].max_port = np;
2681 : 0 : list[ns].phys_port = i;
2682 : 0 : list[ns].phys_dev_name = ibv_match[0]->name;
2683 : 0 : list[ns].eth_dev = NULL;
2684 : 0 : list[ns].pci_dev = pci_dev;
2685 : 0 : list[ns].cdev = cdev;
2686 : 0 : list[ns].pf_bond = bd;
2687 : 0 : list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2688 : 0 : list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2689 : : ibv_match[0]->name,
2690 : : i, &cdev->dev_info);
2691 [ # # ]: 0 : if (!list[ns].ifindex) {
2692 : : /*
2693 : : * No network interface index found for the
2694 : : * specified port, it means there is no
2695 : : * representor on this port. It's OK,
2696 : : * there can be disabled ports, for example
2697 : : * if sriov_numvfs < sriov_totalvfs.
2698 : : */
2699 : 0 : continue;
2700 : : }
2701 : 0 : ret = -1;
2702 [ # # ]: 0 : if (nl_route >= 0)
2703 : 0 : ret = mlx5_nl_switch_info(nl_route,
2704 : : list[ns].ifindex,
2705 : : &list[ns].info);
2706 [ # # # # ]: 0 : if (ret || (!list[ns].info.representor &&
2707 : : !list[ns].info.master)) {
2708 : : /*
2709 : : * We failed to recognize representors with
2710 : : * Netlink, let's try to perform the task
2711 : : * with sysfs.
2712 : : */
2713 : 0 : ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2714 : : &list[ns].info);
2715 : : }
2716 [ # # # # ]: 0 : if (!ret && bd >= 0) {
2717 [ # # # ]: 0 : switch (list[ns].info.name_type) {
2718 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2719 [ # # ]: 0 : if (np == 1) {
2720 : : /*
2721 : : * Force standalone bonding
2722 : : * device for ROCE LAG
2723 : : * configurations.
2724 : : */
2725 : 0 : list[ns].info.master = 0;
2726 : 0 : list[ns].info.representor = 0;
2727 : : }
2728 : 0 : ns++;
2729 : 0 : break;
2730 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2731 : : /* Fallthrough */
2732 : : case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2733 : : /* Fallthrough */
2734 : : case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2735 [ # # ]: 0 : if (list[ns].info.pf_num == bd)
2736 : 0 : ns++;
2737 : : break;
2738 : : default:
2739 : : break;
2740 : : }
2741 : 0 : continue;
2742 : : }
2743 [ # # # # ]: 0 : if (!ret && mpesw >= 0) {
2744 [ # # # ]: 0 : switch (list[ns].info.name_type) {
2745 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2746 : : /* Owner port is treated as master port. */
2747 [ # # ]: 0 : if (list[ns].info.port_name == mpesw) {
2748 : 0 : list[ns].info.master = 1;
2749 : 0 : list[ns].info.representor = 0;
2750 : : } else {
2751 : 0 : list[ns].info.master = 0;
2752 : 0 : list[ns].info.representor = 1;
2753 : : }
2754 : : /*
2755 : : * Ports of this type have uplink port index
2756 : : * encoded in the name. This index is also a PF index.
2757 : : */
2758 : 0 : list[ns].info.pf_num = list[ns].info.port_name;
2759 : 0 : list[ns].mpesw_port = list[ns].info.port_name;
2760 : 0 : list[ns].info.mpesw_owner = mpesw;
2761 : 0 : ns++;
2762 : 0 : break;
2763 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2764 : : case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2765 : : case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2766 : : /*
2767 : : * Ports of this type have PF index encoded in name,
2768 : : * which translate to the related uplink port index.
2769 : : */
2770 : 0 : list[ns].mpesw_port = list[ns].info.pf_num;
2771 : : /* MPESW owner is also saved but not used now. */
2772 : 0 : list[ns].info.mpesw_owner = mpesw;
2773 : 0 : ns++;
2774 : 0 : break;
2775 : : default:
2776 : : break;
2777 : : }
2778 : 0 : continue;
2779 : : }
2780 [ # # ]: 0 : if (!ret && (list[ns].info.representor ^
2781 [ # # ]: 0 : list[ns].info.master))
2782 : 0 : ns++;
2783 : : }
2784 : : } else {
2785 : : /*
2786 : : * The existence of several matching entries (nd > 1) means
2787 : : * port representors have been instantiated. No existing Verbs
2788 : : * call nor sysfs entries can tell them apart, this can only
2789 : : * be done through Netlink calls assuming kernel drivers are
2790 : : * recent enough to support them.
2791 : : *
2792 : : * In the event of identification failure through Netlink,
2793 : : * try again through sysfs, then:
2794 : : *
2795 : : * 1. A single IB device matches (nd == 1) with single
2796 : : * port (np=0/1) and is not a representor, assume
2797 : : * no switch support.
2798 : : *
2799 : : * 2. Otherwise no safe assumptions can be made;
2800 : : * complain louder and bail out.
2801 : : */
2802 [ # # ]: 0 : for (i = 0; i != nd; ++i) {
2803 [ # # ]: 0 : memset(&list[ns].info, 0, sizeof(list[ns].info));
2804 : 0 : list[ns].bond_info = NULL;
2805 : 0 : list[ns].max_port = 1;
2806 : 0 : list[ns].phys_port = 1;
2807 : 0 : list[ns].phys_dev_name = ibv_match[i]->name;
2808 : 0 : list[ns].eth_dev = NULL;
2809 : 0 : list[ns].pci_dev = pci_dev;
2810 : 0 : list[ns].cdev = cdev;
2811 : 0 : list[ns].pf_bond = -1;
2812 : 0 : list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2813 : 0 : list[ns].ifindex = 0;
2814 [ # # ]: 0 : if (nl_rdma >= 0)
2815 : 0 : list[ns].ifindex = mlx5_nl_ifindex
2816 : : (nl_rdma,
2817 : : ibv_match[i]->name,
2818 : : 1, &cdev->dev_info);
2819 [ # # ]: 0 : if (!list[ns].ifindex) {
2820 : : char ifname[IF_NAMESIZE];
2821 : :
2822 : : /*
2823 : : * Netlink failed, it may happen with old
2824 : : * ib_core kernel driver (before 4.16).
2825 : : * We can assume there is old driver because
2826 : : * here we are processing single ports IB
2827 : : * devices. Let's try sysfs to retrieve
2828 : : * the ifindex. The method works for
2829 : : * master device only.
2830 : : */
2831 [ # # ]: 0 : if (nd > 1) {
2832 : : /*
2833 : : * Multiple devices found, assume
2834 : : * representors, can not distinguish
2835 : : * master/representor and retrieve
2836 : : * ifindex via sysfs.
2837 : : */
2838 : 0 : continue;
2839 : : }
2840 : 0 : ret = mlx5_get_ifname_sysfs
2841 : 0 : (ibv_match[i]->ibdev_path, ifname);
2842 [ # # ]: 0 : if (!ret)
2843 : 0 : list[ns].ifindex =
2844 : 0 : if_nametoindex(ifname);
2845 [ # # ]: 0 : if (!list[ns].ifindex) {
2846 : : /*
2847 : : * No network interface index found
2848 : : * for the specified device, it means
2849 : : * there it is neither representor
2850 : : * nor master.
2851 : : */
2852 : 0 : continue;
2853 : : }
2854 : : }
2855 : 0 : ret = -1;
2856 [ # # ]: 0 : if (nl_route >= 0)
2857 : 0 : ret = mlx5_nl_switch_info(nl_route,
2858 : : list[ns].ifindex,
2859 : : &list[ns].info);
2860 [ # # # # ]: 0 : if (ret || (!list[ns].info.representor &&
2861 : : !list[ns].info.master)) {
2862 : : /*
2863 : : * We failed to recognize representors with
2864 : : * Netlink, let's try to perform the task
2865 : : * with sysfs.
2866 : : */
2867 : 0 : ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2868 : : &list[ns].info);
2869 : : }
2870 [ # # ]: 0 : if (!ret && (list[ns].info.representor ^
2871 [ # # ]: 0 : list[ns].info.master)) {
2872 : 0 : ns++;
2873 [ # # ]: 0 : } else if ((nd == 1) &&
2874 [ # # ]: 0 : !list[ns].info.representor &&
2875 : : !list[ns].info.master) {
2876 : : /*
2877 : : * Single IB device with one physical port and
2878 : : * attached network device.
2879 : : * May be SRIOV is not enabled or there is no
2880 : : * representors.
2881 : : */
2882 : 0 : DRV_LOG(INFO, "No E-Switch support detected.");
2883 : 0 : ns++;
2884 : 0 : break;
2885 : : }
2886 : : }
2887 [ # # ]: 0 : if (!ns) {
2888 : 0 : DRV_LOG(ERR,
2889 : : "Unable to recognize master/representors on the multiple IB devices.");
2890 : 0 : rte_errno = ENOENT;
2891 : 0 : ret = -rte_errno;
2892 : 0 : goto exit;
2893 : : }
2894 : : /*
2895 : : * New kernels may add the switch_id attribute for the case
2896 : : * there is no E-Switch and we wrongly recognized the only
2897 : : * device as master. Override this if there is the single
2898 : : * device with single port and new device name format present.
2899 : : */
2900 [ # # ]: 0 : if (nd == 1 &&
2901 [ # # ]: 0 : list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2902 : 0 : list[0].info.master = 0;
2903 : 0 : list[0].info.representor = 0;
2904 : : }
2905 : : }
2906 : : MLX5_ASSERT(ns);
2907 : : /* Calculate number of uplinks and host PFs for each matched IB device. */
2908 : 0 : calc_nb_uplinks_hpfs(ibv_match, nd, list, ns);
2909 : : /*
2910 : : * Sort list to probe devices in natural order for users convenience
2911 : : * (i.e. master first, then representors from lowest to highest ID).
2912 : : */
2913 : 0 : qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2914 [ # # ]: 0 : if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2915 : : /* Set devargs default values. */
2916 [ # # # # ]: 0 : if (eth_da.nb_ports == 0 && ns > 0) {
2917 [ # # # # ]: 0 : if (list[0].pf_bond >= 0 && list[0].info.representor)
2918 : 0 : DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2919 : : pci_dev->device.devargs->args);
2920 : 0 : eth_da.nb_ports = 1;
2921 : 0 : eth_da.ports[0] = list[0].info.port_name;
2922 : : }
2923 [ # # ]: 0 : if (eth_da.nb_representor_ports == 0) {
2924 : 0 : eth_da.nb_representor_ports = 1;
2925 : 0 : eth_da.representor_ports[0] = 0;
2926 : : }
2927 : : }
2928 [ # # ]: 0 : for (i = 0; i != ns; ++i) {
2929 : : uint32_t restore;
2930 : :
2931 : 0 : list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da,
2932 : : mkvlist);
2933 [ # # ]: 0 : if (!list[i].eth_dev) {
2934 [ # # ]: 0 : if (rte_errno != EBUSY && rte_errno != EEXIST)
2935 : : break;
2936 : : /* Device is disabled or already spawned. Ignore it. */
2937 : 0 : continue;
2938 : : }
2939 : 0 : restore = list[i].eth_dev->data->dev_flags;
2940 : 0 : rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2941 : : /**
2942 : : * Each representor has a dedicated interrupts vector.
2943 : : * rte_eth_copy_pci_info() assigns PF interrupts handle to
2944 : : * representor eth_dev object because representor and PF
2945 : : * share the same PCI address.
2946 : : * Override representor device with a dedicated
2947 : : * interrupts handle here.
2948 : : * Representor interrupts handle is released in mlx5_dev_stop().
2949 : : */
2950 [ # # ]: 0 : if (list[i].info.representor) {
2951 : : struct rte_intr_handle *intr_handle =
2952 : 0 : rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2953 [ # # ]: 0 : if (intr_handle == NULL) {
2954 : 0 : DRV_LOG(ERR,
2955 : : "port %u failed to allocate memory for interrupt handler "
2956 : : "Rx interrupts will not be supported",
2957 : : i);
2958 : 0 : rte_errno = ENOMEM;
2959 : 0 : ret = -rte_errno;
2960 : 0 : goto exit;
2961 : : }
2962 : 0 : list[i].eth_dev->intr_handle = intr_handle;
2963 : : }
2964 : : /* Restore non-PCI flags cleared by the above call. */
2965 : 0 : list[i].eth_dev->data->dev_flags |= restore;
2966 : 0 : rte_eth_dev_probing_finish(list[i].eth_dev);
2967 : : }
2968 [ # # ]: 0 : if (i != ns) {
2969 : 0 : DRV_LOG(ERR,
2970 : : "probe of PCI device " PCI_PRI_FMT " aborted after"
2971 : : " encountering an error: %s",
2972 : : owner_pci.domain, owner_pci.bus,
2973 : : owner_pci.devid, owner_pci.function,
2974 : : strerror(rte_errno));
2975 : 0 : ret = -rte_errno;
2976 : : /* Roll back. */
2977 [ # # ]: 0 : while (i--) {
2978 [ # # ]: 0 : if (!list[i].eth_dev)
2979 : 0 : continue;
2980 : 0 : mlx5_dev_close(list[i].eth_dev);
2981 : : /* mac_addrs must not be freed because in dev_private */
2982 : 0 : list[i].eth_dev->data->mac_addrs = NULL;
2983 : 0 : claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2984 : : }
2985 : : /* Restore original error. */
2986 : 0 : rte_errno = -ret;
2987 : : } else {
2988 : 0 : ret = 0;
2989 : : }
2990 : 0 : exit:
2991 : : /*
2992 : : * Do the routine cleanup:
2993 : : * - close opened Netlink sockets
2994 : : * - free allocated spawn data array
2995 : : * - free the Infiniband device list
2996 : : */
2997 [ # # ]: 0 : if (nl_rdma >= 0)
2998 : 0 : close(nl_rdma);
2999 [ # # ]: 0 : if (nl_route >= 0)
3000 : 0 : close(nl_route);
3001 [ # # ]: 0 : if (list)
3002 : 0 : mlx5_free(list);
3003 : : MLX5_ASSERT(ibv_list);
3004 : 0 : mlx5_glue->free_device_list(ibv_list);
3005 [ # # ]: 0 : if (ret) {
3006 [ # # ]: 0 : if (cdev->dev_info.port_info != NULL)
3007 : 0 : mlx5_free(cdev->dev_info.port_info);
3008 : 0 : memset(&cdev->dev_info, 0, sizeof(cdev->dev_info));
3009 : : }
3010 : 0 : return ret;
3011 : : }
3012 : :
3013 : : static int
3014 : 0 : mlx5_os_parse_eth_devargs(struct rte_device *dev,
3015 : : struct rte_eth_devargs *eth_da)
3016 : : {
3017 : : int ret = 0;
3018 : :
3019 [ # # ]: 0 : if (dev->devargs == NULL)
3020 : : return 0;
3021 : : memset(eth_da, 0, sizeof(*eth_da));
3022 : : /* Parse representor information first from class argument. */
3023 [ # # ]: 0 : if (dev->devargs->cls_str)
3024 : 0 : ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da, 1);
3025 [ # # ]: 0 : if (ret < 0) {
3026 : 0 : DRV_LOG(ERR, "failed to parse device arguments: %s",
3027 : : dev->devargs->cls_str);
3028 : 0 : return -rte_errno;
3029 : : }
3030 [ # # # # ]: 0 : if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) {
3031 : : /* Parse legacy device argument */
3032 : 0 : ret = rte_eth_devargs_parse(dev->devargs->args, eth_da, 1);
3033 [ # # ]: 0 : if (ret < 0) {
3034 : 0 : DRV_LOG(ERR, "failed to parse device arguments: %s",
3035 : : dev->devargs->args);
3036 : 0 : return -rte_errno;
3037 : : }
3038 : : }
3039 : : return 0;
3040 : : }
3041 : :
3042 : : /**
3043 : : * Callback to register a PCI device.
3044 : : *
3045 : : * This function spawns Ethernet devices out of a given PCI device.
3046 : : *
3047 : : * @param[in] cdev
3048 : : * Pointer to common mlx5 device structure.
3049 : : * @param[in, out] mkvlist
3050 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
3051 : : *
3052 : : * @return
3053 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
3054 : : */
3055 : : static int
3056 : 0 : mlx5_os_pci_probe(struct mlx5_common_device *cdev,
3057 : : struct mlx5_kvargs_ctrl *mkvlist)
3058 : : {
3059 : 0 : struct rte_pci_device *pci_dev = RTE_BUS_DEVICE(cdev->dev, *pci_dev);
3060 : 0 : struct rte_eth_devargs eth_da = { .nb_ports = 0 };
3061 : : int ret = 0;
3062 : : uint16_t p;
3063 : :
3064 : 0 : ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da);
3065 [ # # ]: 0 : if (ret != 0)
3066 : : return ret;
3067 : :
3068 [ # # ]: 0 : if (eth_da.nb_ports > 0) {
3069 : : /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
3070 [ # # ]: 0 : for (p = 0; p < eth_da.nb_ports; p++) {
3071 : 0 : ret = mlx5_os_pci_probe_pf(cdev, ð_da,
3072 : 0 : eth_da.ports[p], mkvlist);
3073 [ # # ]: 0 : if (ret) {
3074 : 0 : DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " "
3075 : : "aborted due to proding failure of PF %u",
3076 : : pci_dev->addr.domain, pci_dev->addr.bus,
3077 : : pci_dev->addr.devid, pci_dev->addr.function,
3078 : : eth_da.ports[p]);
3079 : 0 : mlx5_net_remove(cdev);
3080 [ # # ]: 0 : if (p != 0)
3081 : : break;
3082 : : }
3083 : : }
3084 : : } else {
3085 : 0 : ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist);
3086 : : }
3087 : : return ret;
3088 : : }
3089 : :
3090 : : /* Probe a single SF device on auxiliary bus, no representor support. */
3091 : : static int
3092 : 0 : mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,
3093 : : struct mlx5_kvargs_ctrl *mkvlist)
3094 : : {
3095 : 0 : struct rte_eth_devargs eth_da = { .nb_ports = 0 };
3096 : 0 : struct mlx5_dev_spawn_data spawn = {
3097 : : .pf_bond = -1,
3098 : : .mpesw_port = MLX5_MPESW_PORT_INVALID,
3099 : : };
3100 : 0 : struct rte_device *dev = cdev->dev;
3101 : : struct rte_auxiliary_device *adev = RTE_BUS_DEVICE(dev, *adev);
3102 : : struct rte_eth_dev *eth_dev;
3103 : : int ret = 0;
3104 : :
3105 : : /* Parse ethdev devargs. */
3106 : 0 : ret = mlx5_os_parse_eth_devargs(dev, ð_da);
3107 [ # # ]: 0 : if (ret != 0)
3108 : : return ret;
3109 : : /* Init spawn data. */
3110 : 0 : spawn.max_port = 1;
3111 : 0 : spawn.phys_port = 1;
3112 [ # # ]: 0 : spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
3113 : 0 : ret = mlx5_auxiliary_get_ifindex(dev->name);
3114 [ # # ]: 0 : if (ret < 0) {
3115 : 0 : DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
3116 : 0 : return ret;
3117 : : }
3118 : 0 : spawn.ifindex = ret;
3119 : 0 : spawn.cdev = cdev;
3120 : : /* Spawn device. */
3121 : 0 : eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist);
3122 [ # # ]: 0 : if (eth_dev == NULL)
3123 : 0 : return -rte_errno;
3124 : : /* Post create. */
3125 : 0 : eth_dev->intr_handle = adev->intr_handle;
3126 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3127 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3128 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
3129 : 0 : eth_dev->data->numa_node = dev->numa_node;
3130 : : }
3131 : 0 : rte_eth_dev_probing_finish(eth_dev);
3132 : 0 : return 0;
3133 : : }
3134 : :
3135 : : /**
3136 : : * Net class driver callback to probe a device.
3137 : : *
3138 : : * This function probe PCI bus device(s) or a single SF on auxiliary bus.
3139 : : *
3140 : : * @param[in] cdev
3141 : : * Pointer to the common mlx5 device.
3142 : : * @param[in, out] mkvlist
3143 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
3144 : : *
3145 : : * @return
3146 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
3147 : : */
3148 : : int
3149 : 0 : mlx5_os_net_probe(struct mlx5_common_device *cdev,
3150 : : struct mlx5_kvargs_ctrl *mkvlist)
3151 : : {
3152 : : int ret;
3153 : :
3154 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3155 : 0 : mlx5_pmd_socket_init();
3156 : 0 : ret = mlx5_init_once();
3157 [ # # ]: 0 : if (ret) {
3158 : 0 : DRV_LOG(ERR, "Unable to init PMD global data: %s",
3159 : : strerror(rte_errno));
3160 : 0 : return -rte_errno;
3161 : : }
3162 : 0 : ret = mlx5_probe_again_args_validate(cdev, mkvlist);
3163 [ # # ]: 0 : if (ret) {
3164 : 0 : DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
3165 : : strerror(rte_errno));
3166 : 0 : return -rte_errno;
3167 : : }
3168 [ # # ]: 0 : if (mlx5_dev_is_pci(cdev->dev))
3169 : 0 : return mlx5_os_pci_probe(cdev, mkvlist);
3170 : : else
3171 : 0 : return mlx5_os_auxiliary_probe(cdev, mkvlist);
3172 : : }
3173 : :
3174 : : /**
3175 : : * Cleanup resources when the last device is closed.
3176 : : */
3177 : : void
3178 : 0 : mlx5_os_net_cleanup(void)
3179 : : {
3180 : 0 : mlx5_pmd_socket_uninit();
3181 : 0 : }
3182 : :
3183 : : /**
3184 : : * Install shared asynchronous device events handler.
3185 : : * This function is implemented to support event sharing
3186 : : * between multiple ports of single IB device.
3187 : : *
3188 : : * @param sh
3189 : : * Pointer to mlx5_dev_ctx_shared object.
3190 : : */
3191 : : void
3192 : 0 : mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
3193 : : {
3194 : 0 : struct ibv_context *ctx = sh->cdev->ctx;
3195 : : int nlsk_fd;
3196 : 0 : uint8_t rdma_monitor_supp = 0;
3197 : :
3198 : 0 : sh->intr_handle = mlx5_os_interrupt_handler_create
3199 : : (RTE_INTR_INSTANCE_F_SHARED, true,
3200 : : ctx->async_fd, mlx5_dev_interrupt_handler, sh);
3201 [ # # ]: 0 : if (!sh->intr_handle) {
3202 : 0 : DRV_LOG(ERR, "Failed to allocate intr_handle.");
3203 : 0 : return;
3204 : : }
3205 [ # # ]: 0 : if (sh->cdev->dev_info.probe_opt &&
3206 [ # # ]: 0 : sh->cdev->dev_info.port_num > 1 &&
3207 [ # # ]: 0 : !sh->rdma_monitor_supp) {
3208 : 0 : nlsk_fd = mlx5_nl_rdma_monitor_init();
3209 [ # # ]: 0 : if (nlsk_fd < 0) {
3210 : 0 : DRV_LOG(ERR, "Failed to create a socket for RDMA Netlink events: %s",
3211 : : rte_strerror(rte_errno));
3212 : 0 : return;
3213 : : }
3214 [ # # ]: 0 : if (mlx5_nl_rdma_monitor_cap_get(nlsk_fd, &rdma_monitor_supp)) {
3215 : 0 : DRV_LOG(ERR, "Failed to query RDMA monitor support: %s",
3216 : : rte_strerror(rte_errno));
3217 : 0 : close(nlsk_fd);
3218 : 0 : return;
3219 : : }
3220 : 0 : sh->rdma_monitor_supp = rdma_monitor_supp;
3221 [ # # ]: 0 : if (sh->rdma_monitor_supp) {
3222 : 0 : sh->intr_handle_ib = mlx5_os_interrupt_handler_create
3223 : : (RTE_INTR_INSTANCE_F_SHARED, true,
3224 : : nlsk_fd, mlx5_dev_interrupt_handler_ib, sh);
3225 [ # # ]: 0 : if (sh->intr_handle_ib == NULL) {
3226 : 0 : DRV_LOG(ERR, "Fail to allocate intr_handle");
3227 : 0 : close(nlsk_fd);
3228 : 0 : return;
3229 : : }
3230 : 0 : sh->cdev->dev_info.async_mon_ready = 1;
3231 : : } else {
3232 : 0 : close(nlsk_fd);
3233 [ # # ]: 0 : if (sh->cdev->dev_info.probe_opt) {
3234 : 0 : DRV_LOG(INFO, "Failed to create rdma link monitor, disable probe optimization");
3235 : 0 : sh->cdev->dev_info.probe_opt = 0;
3236 : 0 : mlx5_free(sh->cdev->dev_info.port_info);
3237 : 0 : sh->cdev->dev_info.port_info = NULL;
3238 : : }
3239 : : }
3240 : : }
3241 : 0 : nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK);
3242 [ # # ]: 0 : if (nlsk_fd < 0) {
3243 : 0 : DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s",
3244 : : rte_strerror(rte_errno));
3245 : 0 : return;
3246 : : }
3247 : 0 : sh->intr_handle_nl = mlx5_os_interrupt_handler_create
3248 : : (RTE_INTR_INSTANCE_F_SHARED, true,
3249 : : nlsk_fd, mlx5_dev_interrupt_handler_nl, sh);
3250 [ # # ]: 0 : if (sh->intr_handle_nl == NULL) {
3251 : 0 : DRV_LOG(ERR, "Fail to allocate intr_handle");
3252 : 0 : return;
3253 : : }
3254 [ # # ]: 0 : if (sh->cdev->config.devx) {
3255 : : #ifdef HAVE_IBV_DEVX_ASYNC
3256 : : struct mlx5dv_devx_cmd_comp *devx_comp;
3257 : :
3258 : 0 : sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
3259 : : devx_comp = sh->devx_comp;
3260 [ # # ]: 0 : if (!devx_comp) {
3261 : 0 : DRV_LOG(INFO, "failed to allocate devx_comp.");
3262 : 0 : return;
3263 : : }
3264 : 0 : sh->intr_handle_devx = mlx5_os_interrupt_handler_create
3265 : : (RTE_INTR_INSTANCE_F_SHARED, true,
3266 : : devx_comp->fd,
3267 : : mlx5_dev_interrupt_handler_devx, sh);
3268 [ # # ]: 0 : if (!sh->intr_handle_devx) {
3269 : 0 : DRV_LOG(ERR, "Failed to allocate intr_handle.");
3270 : 0 : return;
3271 : : }
3272 : : #endif /* HAVE_IBV_DEVX_ASYNC */
3273 : : }
3274 : : }
3275 : :
3276 : : /**
3277 : : * Uninstall shared asynchronous device events handler.
3278 : : * This function is implemented to support event sharing
3279 : : * between multiple ports of single IB device.
3280 : : *
3281 : : * @param dev
3282 : : * Pointer to mlx5_dev_ctx_shared object.
3283 : : */
3284 : : void
3285 : 0 : mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
3286 : : {
3287 : : int fd;
3288 : :
3289 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle,
3290 : : mlx5_dev_interrupt_handler, sh);
3291 : 0 : fd = rte_intr_fd_get(sh->intr_handle_nl);
3292 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl,
3293 : : mlx5_dev_interrupt_handler_nl, sh);
3294 [ # # ]: 0 : if (fd >= 0)
3295 : 0 : close(fd);
3296 : : #ifdef HAVE_IBV_DEVX_ASYNC
3297 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx,
3298 : : mlx5_dev_interrupt_handler_devx, sh);
3299 [ # # ]: 0 : if (sh->devx_comp)
3300 : 0 : mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
3301 : : #endif
3302 : 0 : fd = rte_intr_fd_get(sh->intr_handle_ib);
3303 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_ib,
3304 : : mlx5_dev_interrupt_handler_ib, sh);
3305 [ # # ]: 0 : if (fd >= 0)
3306 : 0 : close(fd);
3307 : 0 : }
3308 : :
3309 : : /**
3310 : : * Read statistics by a named counter.
3311 : : *
3312 : : * @param[in] priv
3313 : : * Pointer to the private device data structure.
3314 : : * @param[in] ctr_name
3315 : : * Pointer to the name of the statistic counter to read
3316 : : * @param[out] stat
3317 : : * Pointer to read statistic value.
3318 : : * @return
3319 : : * 0 on success and stat is valud, 1 if failed to read the value
3320 : : * rte_errno is set.
3321 : : *
3322 : : */
3323 : : int
3324 : 0 : mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
3325 : : uint64_t *stat)
3326 : : {
3327 : : int fd;
3328 : :
3329 [ # # ]: 0 : if (priv->sh) {
3330 [ # # ]: 0 : if (priv->q_counters != NULL &&
3331 [ # # ]: 0 : strcmp(ctr_name, "out_of_buffer") == 0) {
3332 : 0 : return mlx5_read_queue_counter(priv->q_counters, ctr_name, stat);
3333 : : }
3334 [ # # ]: 0 : if (priv->q_counter_hairpin != NULL &&
3335 [ # # ]: 0 : strcmp(ctr_name, "hairpin_out_of_buffer") == 0) {
3336 : 0 : return mlx5_read_queue_counter(priv->q_counter_hairpin, ctr_name, stat);
3337 : : }
3338 : 0 : MKSTR(path, "%s/ports/%d/hw_counters/%s",
3339 : : priv->sh->ibdev_path,
3340 : : priv->dev_port,
3341 : : ctr_name);
3342 : : fd = open(path, O_RDONLY);
3343 : : /*
3344 : : * in switchdev the file location is not per port
3345 : : * but rather in <ibdev_path>/hw_counters/<file_name>.
3346 : : */
3347 [ # # ]: 0 : if (fd == -1) {
3348 : 0 : MKSTR(path1, "%s/hw_counters/%s",
3349 : : priv->sh->ibdev_path,
3350 : : ctr_name);
3351 : : fd = open(path1, O_RDONLY);
3352 : : }
3353 [ # # ]: 0 : if (fd != -1) {
3354 : 0 : char buf[21] = {'\0'};
3355 : : ssize_t n = read(fd, buf, sizeof(buf));
3356 : :
3357 : 0 : close(fd);
3358 [ # # ]: 0 : if (n != -1) {
3359 : 0 : *stat = strtoull(buf, NULL, 10);
3360 : 0 : return 0;
3361 : : }
3362 : : }
3363 : : }
3364 : 0 : *stat = 0;
3365 : 0 : return 1;
3366 : : }
3367 : :
3368 : : /**
3369 : : * Remove a MAC address from device
3370 : : *
3371 : : * @param dev
3372 : : * Pointer to Ethernet device structure.
3373 : : * @param index
3374 : : * MAC address index.
3375 : : */
3376 : : void
3377 : 0 : mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3378 : : {
3379 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3380 : 0 : const int vf = priv->sh->dev_cap.vf;
3381 : :
3382 [ # # ]: 0 : if (vf)
3383 : 0 : mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3384 : : mlx5_ifindex(dev),
3385 : 0 : &dev->data->mac_addrs[index], index);
3386 [ # # ]: 0 : if (index < MLX5_MAX_MAC_ADDRESSES)
3387 : 0 : BITFIELD_RESET(priv->mac_own, index);
3388 : 0 : }
3389 : :
3390 : : /**
3391 : : * Adds a MAC address to the device
3392 : : *
3393 : : * @param dev
3394 : : * Pointer to Ethernet device structure.
3395 : : * @param mac_addr
3396 : : * MAC address to register.
3397 : : * @param index
3398 : : * MAC address index.
3399 : : *
3400 : : * @return
3401 : : * 0 on success, a negative errno value otherwise
3402 : : */
3403 : : int
3404 : 0 : mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3405 : : uint32_t index)
3406 : : {
3407 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3408 : 0 : const int vf = priv->sh->dev_cap.vf;
3409 : : int ret = 0;
3410 : :
3411 [ # # ]: 0 : if (vf)
3412 : 0 : ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3413 : : mlx5_ifindex(dev),
3414 : : mac, index);
3415 [ # # ]: 0 : if (!ret)
3416 : 0 : BITFIELD_SET(priv->mac_own, index);
3417 : :
3418 : 0 : return ret;
3419 : : }
3420 : :
3421 : : /**
3422 : : * Modify a VF MAC address
3423 : : *
3424 : : * @param priv
3425 : : * Pointer to device private data.
3426 : : * @param mac_addr
3427 : : * MAC address to modify into.
3428 : : * @param iface_idx
3429 : : * Net device interface index
3430 : : * @param vf_index
3431 : : * VF index
3432 : : *
3433 : : * @return
3434 : : * 0 on success, a negative errno value otherwise
3435 : : */
3436 : : int
3437 : 0 : mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3438 : : unsigned int iface_idx,
3439 : : struct rte_ether_addr *mac_addr,
3440 : : int vf_index)
3441 : : {
3442 : 0 : return mlx5_nl_vf_mac_addr_modify
3443 : : (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3444 : : }
3445 : :
3446 : : /**
3447 : : * Set device promiscuous mode
3448 : : *
3449 : : * @param dev
3450 : : * Pointer to Ethernet device structure.
3451 : : * @param enable
3452 : : * 0 - promiscuous is disabled, otherwise - enabled
3453 : : *
3454 : : * @return
3455 : : * 0 on success, a negative error value otherwise
3456 : : */
3457 : : int
3458 : 0 : mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
3459 : : {
3460 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3461 : :
3462 : 0 : return mlx5_nl_promisc(priv->nl_socket_route,
3463 : : mlx5_ifindex(dev), !!enable);
3464 : : }
3465 : :
3466 : : /**
3467 : : * Set device promiscuous mode
3468 : : *
3469 : : * @param dev
3470 : : * Pointer to Ethernet device structure.
3471 : : * @param enable
3472 : : * 0 - all multicase is disabled, otherwise - enabled
3473 : : *
3474 : : * @return
3475 : : * 0 on success, a negative error value otherwise
3476 : : */
3477 : : int
3478 : 0 : mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
3479 : : {
3480 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3481 : :
3482 : 0 : return mlx5_nl_allmulti(priv->nl_socket_route,
3483 : : mlx5_ifindex(dev), !!enable);
3484 : : }
3485 : :
3486 : : /**
3487 : : * Flush device MAC addresses
3488 : : *
3489 : : * @param dev
3490 : : * Pointer to Ethernet device structure.
3491 : : *
3492 : : */
3493 : : void
3494 : 0 : mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3495 : : {
3496 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3497 : 0 : const int vf = priv->sh->dev_cap.vf;
3498 : :
3499 : 0 : mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3500 : : dev->data->mac_addrs,
3501 : 0 : MLX5_MAX_MAC_ADDRESSES, priv->mac_own, vf);
3502 : 0 : }
3503 : :
3504 : : static bool
3505 : : mlx5_hws_is_supported(struct mlx5_dev_ctx_shared *sh)
3506 : : {
3507 [ # # # # ]: 0 : return (sh->cdev->config.devx &&
3508 : : sh->cdev->config.hca_attr.wqe_based_flow_table_sup);
3509 : : }
3510 : :
3511 : : static bool
3512 : : mlx5_sws_is_any_supported(struct mlx5_dev_ctx_shared *sh)
3513 : : {
3514 : : struct mlx5_common_device *cdev = sh->cdev;
3515 : : struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
3516 : :
3517 [ # # # # ]: 0 : if (hca_attr->rx_sw_owner_v2 || hca_attr->rx_sw_owner)
3518 : : return true;
3519 : :
3520 [ # # # # ]: 0 : if (hca_attr->tx_sw_owner_v2 || hca_attr->tx_sw_owner)
3521 : : return true;
3522 : :
3523 [ # # # # : 0 : if (hca_attr->eswitch_manager && (hca_attr->esw_sw_owner_v2 || hca_attr->esw_sw_owner))
# # # # ]
3524 : 0 : return true;
3525 : :
3526 : : return false;
3527 : : }
3528 : :
3529 : : /**
3530 : : * Initialize default shared configuration for arguments related to flow engine.
3531 : : *
3532 : : * @param[in] sh
3533 : : * Pointer to shared configuration.
3534 : : * @param[in] sh
3535 : : * Pointer to shared device context.
3536 : : */
3537 : : void
3538 [ # # ]: 0 : mlx5_os_default_flow_config(struct mlx5_sh_config *config, struct mlx5_dev_ctx_shared *sh)
3539 : : {
3540 : : bool hws_is_supported = mlx5_hws_is_supported(sh);
3541 : : bool sws_is_supported = mlx5_sws_is_any_supported(sh);
3542 : :
3543 [ # # ]: 0 : if (!sws_is_supported && hws_is_supported)
3544 : 0 : config->dv_flow_en = 2;
3545 : : else
3546 : 0 : config->dv_flow_en = 1;
3547 : :
3548 [ # # ]: 0 : if (config->dv_flow_en == 2)
3549 : 0 : config->allow_duplicate_pattern = 0;
3550 : : else
3551 : 0 : config->allow_duplicate_pattern = 1;
3552 : 0 : }
3553 : :
3554 : : static bool
3555 : 0 : mlx5_kvargs_is_used(struct mlx5_kvargs_ctrl *mkvlist, const char *key)
3556 : : {
3557 : : const struct rte_kvargs_pair *pair;
3558 : : uint32_t i;
3559 : :
3560 [ # # ]: 0 : for (i = 0; i < mkvlist->kvlist->count; ++i) {
3561 : : pair = &mkvlist->kvlist->pairs[i];
3562 [ # # # # ]: 0 : if (strcmp(pair->key, key) == 0 && mkvlist->is_used[i])
3563 : : return true;
3564 : : }
3565 : : return false;
3566 : : }
3567 : :
3568 [ # # ]: 0 : void mlx5_os_fixup_flow_en(struct mlx5_sh_config *config,
3569 : : struct mlx5_dev_ctx_shared *sh)
3570 : : {
3571 : : bool hws_is_supported = mlx5_hws_is_supported(sh);
3572 : : bool sws_is_supported = mlx5_sws_is_any_supported(sh);
3573 : :
3574 : : /* Inform user if DV flow is not supported. */
3575 [ # # # # ]: 0 : if (config->dv_flow_en == 1 && !sws_is_supported && hws_is_supported) {
3576 : 0 : DRV_LOG(WARNING, "DV flow is not supported. Changing to HWS mode.");
3577 : 0 : config->dv_flow_en = 2;
3578 : : }
3579 : 0 : }
3580 : :
3581 : : void
3582 : 0 : mlx5_os_fixup_duplicate_pattern(struct mlx5_sh_config *config,
3583 : : struct mlx5_kvargs_ctrl *mkvlist,
3584 : : const char *key)
3585 : : {
3586 : : /* Handle allow_duplicate_pattern based on final dv_flow_en mode.
3587 : : * HWS mode (dv_flow_en=2) doesn't support duplicate patterns.
3588 : : * Warn only if user explicitly requested an incompatible setting.
3589 : : */
3590 [ # # # # ]: 0 : bool allow_dup_pattern_set = mkvlist != NULL &&
3591 : 0 : mlx5_kvargs_is_used(mkvlist, key);
3592 [ # # ]: 0 : if (config->dv_flow_en == 2) {
3593 [ # # # # ]: 0 : if (config->allow_duplicate_pattern == 1 && allow_dup_pattern_set)
3594 : 0 : DRV_LOG(WARNING, "Duplicate pattern is not supported with HWS. Disabling it.");
3595 : 0 : config->allow_duplicate_pattern = 0;
3596 [ # # ]: 0 : } else if (!allow_dup_pattern_set) {
3597 : : /* Non-HWS mode: set default to 1 only if not explicitly set by user */
3598 : 0 : config->allow_duplicate_pattern = 1;
3599 : : }
3600 : 0 : }
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