Branch data Line data Source code
1 : : /* SPDX-License-Identifier: BSD-3-Clause
2 : : * Copyright 2018 6WIND S.A.
3 : : * Copyright 2018 Mellanox Technologies, Ltd
4 : : */
5 : :
6 : : #ifndef RTE_PMD_MLX5_COMMON_MR_H_
7 : : #define RTE_PMD_MLX5_COMMON_MR_H_
8 : :
9 : : #include <stddef.h>
10 : : #include <stdint.h>
11 : : #include <sys/queue.h>
12 : :
13 : :
14 : : #include <rte_compat.h>
15 : : #include <rte_rwlock.h>
16 : : #include <rte_bitmap.h>
17 : : #include <rte_mbuf.h>
18 : : #include <rte_memory.h>
19 : :
20 : : #include "mlx5_glue.h"
21 : : #include "mlx5_common_mp.h"
22 : : #include "mlx5_common_defs.h"
23 : :
24 : : struct rte_device;
25 : :
26 : : /* mlx5 PMD MR struct. */
27 : : struct mlx5_pmd_mr {
28 : : uint32_t lkey;
29 : : void *addr;
30 : : size_t len;
31 : : void *obj; /* verbs mr object or devx umem object. */
32 : : struct mlx5_devx_obj *mkey; /* devx mkey object. */
33 : : };
34 : :
35 : : /* Memory Region object. */
36 : : struct mlx5_mr {
37 : : LIST_ENTRY(mlx5_mr) mr; /**< Pointer to the prev/next entry. */
38 : : struct mlx5_pmd_mr pmd_mr; /* PMD memory region. */
39 : : const struct rte_memseg_list *msl;
40 : : int ms_base_idx; /* Start index of msl->memseg_arr[]. */
41 : : int ms_n; /* Number of memsegs in use. */
42 : : uint32_t ms_bmp_n; /* Number of bits in memsegs bit-mask. */
43 : : struct rte_bitmap *ms_bmp; /* Bit-mask of memsegs belonged to MR. */
44 : : };
45 : :
46 : : /* Cache entry for Memory Region. */
47 : : struct __rte_packed_begin mr_cache_entry {
48 : : uintptr_t start; /* Start address of MR. */
49 : : uintptr_t end; /* End address of MR. */
50 : : uint32_t lkey; /* rte_cpu_to_be_32(lkey). */
51 : : } __rte_packed_end;
52 : :
53 : : /* MR Cache table for Binary search. */
54 : : struct __rte_packed_begin mlx5_mr_btree {
55 : : uint32_t len; /* Number of entries. */
56 : : uint32_t size; /* Total number of entries. */
57 : : struct mr_cache_entry (*table)[];
58 : : } __rte_packed_end;
59 : :
60 : : struct mlx5_common_device;
61 : :
62 : : /* Per-queue MR control descriptor. */
63 : : struct __rte_packed_begin mlx5_mr_ctrl {
64 : : uint32_t *dev_gen_ptr; /* Generation number of device to poll. */
65 : : uint32_t cur_gen; /* Generation number saved to flush caches. */
66 : : uint16_t mru; /* Index of last hit entry in top-half cache. */
67 : : uint16_t head; /* Index of the oldest entry in top-half cache. */
68 : : struct mr_cache_entry cache[MLX5_MR_CACHE_N]; /* Cache for top-half. */
69 : : struct mlx5_mr_btree cache_bh; /* Cache for bottom-half. */
70 : : } __rte_packed_end;
71 : :
72 : : LIST_HEAD(mlx5_mr_list, mlx5_mr);
73 : : LIST_HEAD(mlx5_mempool_reg_list, mlx5_mempool_reg);
74 : :
75 : : /* Global per-device MR cache. */
76 : : struct __rte_packed_begin mlx5_mr_share_cache {
77 : : uint32_t dev_gen; /* Generation number to flush local caches. */
78 : : rte_rwlock_t rwlock; /* MR cache Lock. */
79 : : rte_rwlock_t mprwlock; /* Mempool Registration Lock. */
80 : : struct mlx5_mr_btree cache; /* Global MR cache table. */
81 : : struct mlx5_mr_list mr_list; /* Registered MR list. */
82 : : struct mlx5_mr_list mr_free_list; /* Freed MR list. */
83 : : struct mlx5_mempool_reg_list mempool_reg_list; /* Mempool database. */
84 : : } __rte_packed_end;
85 : :
86 : : /* Multi-Packet RQ buffer header. */
87 : : struct __rte_cache_aligned mlx5_mprq_buf {
88 : : struct rte_mempool *mp;
89 : : RTE_ATOMIC(uint16_t) refcnt; /* Atomically accessed refcnt. */
90 : : struct rte_mbuf_ext_shared_info shinfos[];
91 : : /*
92 : : * Shared information per stride.
93 : : * More memory will be allocated for the first stride head-room and for
94 : : * the strides data.
95 : : */
96 : : };
97 : :
98 : : __rte_internal
99 : : void mlx5_mprq_buf_free_cb(void *addr, void *opaque);
100 : :
101 : : /**
102 : : * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which the
103 : : * cloned mbuf is allocated is returned instead.
104 : : *
105 : : * @param buf
106 : : * Pointer to mbuf.
107 : : *
108 : : * @return
109 : : * Memory pool where data is located for given mbuf.
110 : : */
111 : : static inline struct rte_mempool *
112 : : mlx5_mb2mp(struct rte_mbuf *buf)
113 : : {
114 [ # # ]: 0 : if (unlikely(RTE_MBUF_CLONED(buf)))
115 : 0 : return rte_mbuf_from_indirect(buf)->pool;
116 : 0 : return buf->pool;
117 : : }
118 : :
119 : : /**
120 : : * Look up LKey from given lookup table by linear search. Firstly look up the
121 : : * last-hit entry. If miss, the entire array is searched. If found, update the
122 : : * last-hit index and return LKey.
123 : : *
124 : : * @param lkp_tbl
125 : : * Pointer to lookup table.
126 : : * @param[in,out] cached_idx
127 : : * Pointer to last-hit index.
128 : : * @param n
129 : : * Size of lookup table.
130 : : * @param addr
131 : : * Search key.
132 : : *
133 : : * @return
134 : : * Searched LKey on success, UINT32_MAX on no match.
135 : : */
136 : : static __rte_always_inline uint32_t
137 : : mlx5_mr_lookup_lkey(struct mr_cache_entry *lkp_tbl, uint16_t *cached_idx,
138 : : uint16_t n, uintptr_t addr)
139 : : {
140 : : uint16_t idx;
141 : :
142 [ # # # # : 0 : if (likely(addr >= lkp_tbl[*cached_idx].start &&
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143 : : addr < lkp_tbl[*cached_idx].end))
144 : 0 : return lkp_tbl[*cached_idx].lkey;
145 [ # # # # : 0 : for (idx = 0; idx < n && lkp_tbl[idx].start != 0; ++idx) {
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146 [ # # # # : 0 : if (addr >= lkp_tbl[idx].start &&
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147 [ # # # # : 0 : addr < lkp_tbl[idx].end) {
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148 : : /* Found. */
149 : 0 : *cached_idx = idx;
150 : 0 : return lkp_tbl[idx].lkey;
151 : : }
152 : : }
153 : : return UINT32_MAX;
154 : : }
155 : :
156 : : __rte_internal
157 : : void mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl);
158 : :
159 : : /**
160 : : * Bottom-half of LKey search on. If supported, lookup for the address from
161 : : * the mempool. Otherwise, search in old mechanism caches.
162 : : *
163 : : * @param mr_ctrl
164 : : * Pointer to per-queue MR control structure.
165 : : * @param mb
166 : : * Pointer to mbuf.
167 : : *
168 : : * @return
169 : : * Searched LKey on success, UINT32_MAX on no match.
170 : : */
171 : : __rte_internal
172 : : uint32_t mlx5_mr_mb2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mbuf);
173 : :
174 : : /**
175 : : * Query LKey from a packet buffer.
176 : : *
177 : : * @param mr_ctrl
178 : : * Pointer to per-queue MR control structure.
179 : : * @param mbuf
180 : : * Pointer to mbuf.
181 : : *
182 : : * @return
183 : : * Searched LKey on success, UINT32_MAX on no match.
184 : : */
185 : : static __rte_always_inline uint32_t
186 : : mlx5_mr_mb2mr(struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mbuf)
187 : : {
188 : : uint32_t lkey;
189 : :
190 : : /* Check generation bit to see if there's any change on existing MRs. */
191 [ # # # # : 0 : if (unlikely(*mr_ctrl->dev_gen_ptr != mr_ctrl->cur_gen))
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192 : 0 : mlx5_mr_flush_local_cache(mr_ctrl);
193 : : /* Linear search on MR cache array. */
194 : 0 : lkey = mlx5_mr_lookup_lkey(mr_ctrl->cache, &mr_ctrl->mru,
195 [ # # # # : 0 : MLX5_MR_CACHE_N, (uintptr_t)mbuf->buf_addr);
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196 [ # # # # : 0 : if (likely(lkey != UINT32_MAX))
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197 : : return lkey;
198 : : /* Take slower bottom-half on miss. */
199 : 0 : return mlx5_mr_mb2mr_bh(mr_ctrl, mbuf);
200 : : }
201 : :
202 : : /* mlx5_common_mr.c */
203 : :
204 : : __rte_internal
205 : : int mlx5_mr_ctrl_init(struct mlx5_mr_ctrl *mr_ctrl, uint32_t *dev_gen_ptr,
206 : : int socket);
207 : : __rte_internal
208 : : void mlx5_mr_btree_free(struct mlx5_mr_btree *bt);
209 : : void mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused);
210 : : __rte_internal
211 : : uint32_t mlx5_mr_mempool2mr_bh(struct mlx5_mr_ctrl *mr_ctrl,
212 : : struct rte_mempool *mp, uintptr_t addr);
213 : : int mlx5_mr_expand_cache(struct mlx5_mr_share_cache *share_cache,
214 : : uint32_t new_size, int socket);
215 : : void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache);
216 : : int mlx5_mr_create_cache(struct mlx5_mr_share_cache *share_cache, int socket);
217 : : void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused);
218 : : void mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache);
219 : : void mlx5_free_mr_by_addr(struct mlx5_mr_share_cache *share_cache,
220 : : const char *ibdev_name, const void *addr, size_t len);
221 : : int mlx5_mr_insert_cache(struct mlx5_mr_share_cache *share_cache,
222 : : struct mlx5_mr *mr);
223 : : struct mlx5_mr *
224 : : mlx5_mr_lookup_list(struct mlx5_mr_share_cache *share_cache,
225 : : struct mr_cache_entry *entry, uintptr_t addr);
226 : : struct mlx5_mr *
227 : : mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id);
228 : : void mlx5_mr_free(struct mlx5_mr *mr);
229 : : __rte_internal
230 : : uint32_t
231 : : mlx5_mr_create(struct mlx5_common_device *cdev,
232 : : struct mlx5_mr_share_cache *share_cache,
233 : : struct mr_cache_entry *entry, uintptr_t addr);
234 : :
235 : : __rte_internal
236 : : uint32_t
237 : : mlx5_mr_addr2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, uintptr_t addr);
238 : :
239 : : __rte_internal
240 : : int
241 : : mlx5_os_reg_mr(void *pd, void *addr, size_t length,
242 : : struct mlx5_pmd_mr *pmd_mr);
243 : : __rte_internal
244 : : void
245 : : mlx5_os_dereg_mr(struct mlx5_pmd_mr *pmd_mr);
246 : :
247 : : __rte_internal
248 : : struct mlx5_pmd_mr *
249 : : mlx5_os_alloc_null_mr(struct rte_device *dev, void *pd);
250 : : __rte_internal
251 : : void
252 : : mlx5_os_free_null_mr(struct mlx5_pmd_mr *null_mr);
253 : :
254 : : __rte_internal
255 : : int
256 : : mlx5_mr_mempool_register(struct mlx5_common_device *cdev,
257 : : struct rte_mempool *mp, bool is_extmem);
258 : : __rte_internal
259 : : int
260 : : mlx5_mr_mempool_unregister(struct mlx5_common_device *cdev,
261 : : struct rte_mempool *mp);
262 : :
263 : : __rte_internal
264 : : int
265 : : mlx5_mr_mempool_populate_cache(struct mlx5_mr_ctrl *mr_ctrl,
266 : : struct rte_mempool *mp);
267 : :
268 : : #endif /* RTE_PMD_MLX5_COMMON_MR_H_ */
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