LCOV - code coverage report
Current view: top level - drivers/crypto/virtio - virtio_pci.h (source / functions) Hit Total Coverage
Test: Code coverage Lines: 0 1 0.0 %
Date: 2025-05-01 17:49:45 Functions: 0 0 -
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: 0 12 0.0 %

           Branch data     Line data    Source code
       1                 :            : /* SPDX-License-Identifier: BSD-3-Clause
       2                 :            :  * Copyright(c) 2018 HUAWEI TECHNOLOGIES CO., LTD.
       3                 :            :  */
       4                 :            : 
       5                 :            : #ifndef _VIRTIO_PCI_H_
       6                 :            : #define _VIRTIO_PCI_H_
       7                 :            : 
       8                 :            : #include <stdint.h>
       9                 :            : 
      10                 :            : #include <rte_eal_paging.h>
      11                 :            : #include <rte_pci.h>
      12                 :            : #include <bus_pci_driver.h>
      13                 :            : #include <rte_cryptodev.h>
      14                 :            : 
      15                 :            : #include "virtio_crypto.h"
      16                 :            : 
      17                 :            : struct virtqueue;
      18                 :            : 
      19                 :            : /* VirtIO PCI vendor/device ID. */
      20                 :            : #define VIRTIO_CRYPTO_PCI_VENDORID 0x1AF4
      21                 :            : #define VIRTIO_CRYPTO_PCI_DEVICEID 0x1054
      22                 :            : 
      23                 :            : /* VirtIO device IDs. */
      24                 :            : #define VIRTIO_ID_CRYPTO  20
      25                 :            : 
      26                 :            : /* VirtIO ABI version, this must match exactly. */
      27                 :            : #define VIRTIO_PCI_ABI_VERSION 0
      28                 :            : 
      29                 :            : /*
      30                 :            :  * VirtIO Header, located in BAR 0.
      31                 :            :  */
      32                 :            : #define VIRTIO_PCI_HOST_FEATURES  0  /* host's supported features (32bit, RO)*/
      33                 :            : #define VIRTIO_PCI_GUEST_FEATURES 4  /* guest's supported features (32, RW) */
      34                 :            : #define VIRTIO_PCI_QUEUE_PFN      8  /* physical address of VQ (32, RW) */
      35                 :            : #define VIRTIO_PCI_QUEUE_NUM      12 /* number of ring entries (16, RO) */
      36                 :            : #define VIRTIO_PCI_QUEUE_SEL      14 /* current VQ selection (16, RW) */
      37                 :            : #define VIRTIO_PCI_QUEUE_NOTIFY   16 /* notify host regarding VQ (16, RW) */
      38                 :            : #define VIRTIO_PCI_STATUS         18 /* device status register (8, RW) */
      39                 :            : #define VIRTIO_PCI_ISR            19 /* interrupt status register, reading
      40                 :            :                                       * also clears the register (8, RO)
      41                 :            :                                       */
      42                 :            : /* Only if MSIX is enabled: */
      43                 :            : 
      44                 :            : /* configuration change vector (16, RW) */
      45                 :            : #define VIRTIO_MSI_CONFIG_VECTOR  20
      46                 :            : /* vector for selected VQ notifications */
      47                 :            : #define VIRTIO_MSI_QUEUE_VECTOR   22
      48                 :            : 
      49                 :            : /* The bit of the ISR which indicates a device has an interrupt. */
      50                 :            : #define VIRTIO_PCI_ISR_INTR   0x1
      51                 :            : /* The bit of the ISR which indicates a device configuration change. */
      52                 :            : #define VIRTIO_PCI_ISR_CONFIG 0x2
      53                 :            : /* Vector value used to disable MSI for queue. */
      54                 :            : #define VIRTIO_MSI_NO_VECTOR 0xFFFF
      55                 :            : 
      56                 :            : /* Status byte for guest to report progress. */
      57                 :            : #define VIRTIO_CONFIG_STATUS_RESET     0x00
      58                 :            : #define VIRTIO_CONFIG_STATUS_ACK       0x01
      59                 :            : #define VIRTIO_CONFIG_STATUS_DRIVER    0x02
      60                 :            : #define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04
      61                 :            : #define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08
      62                 :            : #define VIRTIO_CONFIG_STATUS_DEV_NEED_RESET     0x40
      63                 :            : #define VIRTIO_CONFIG_STATUS_FAILED    0x80
      64                 :            : 
      65                 :            : /* The alignment to use between consumer and producer parts of vring. */
      66                 :            : #define VIRTIO_VRING_ALIGN 4096
      67                 :            : 
      68                 :            : /*
      69                 :            :  * Each virtqueue indirect descriptor list must be physically contiguous.
      70                 :            :  * To allow us to malloc(9) each list individually, limit the number
      71                 :            :  * supported to what will fit in one page. With 4KB pages, this is a limit
      72                 :            :  * of 256 descriptors. If there is ever a need for more, we can switch to
      73                 :            :  * contigmalloc(9) for the larger allocations, similar to what
      74                 :            :  * bus_dmamem_alloc(9) does.
      75                 :            :  *
      76                 :            :  * Note the sizeof(struct vring_desc) is 16 bytes.
      77                 :            :  */
      78                 :            : #define VIRTIO_MAX_INDIRECT ((int) (rte_mem_page_size() / 16))
      79                 :            : 
      80                 :            : /* Do we get callbacks when the ring is completely used, even if we've
      81                 :            :  * suppressed them?
      82                 :            :  */
      83                 :            : #define VIRTIO_F_NOTIFY_ON_EMPTY        24
      84                 :            : 
      85                 :            : /* Can the device handle any descriptor layout? */
      86                 :            : #define VIRTIO_F_ANY_LAYOUT             27
      87                 :            : 
      88                 :            : /* We support indirect buffer descriptors */
      89                 :            : #define VIRTIO_RING_F_INDIRECT_DESC     28
      90                 :            : 
      91                 :            : #define VIRTIO_F_VERSION_1              32
      92                 :            : #define VIRTIO_F_IOMMU_PLATFORM 33
      93                 :            : #define VIRTIO_F_RING_PACKED    34
      94                 :            : 
      95                 :            : /*
      96                 :            :  * Inorder feature indicates that all buffers are used by the device
      97                 :            :  * in the same order in which they have been made available.
      98                 :            :  */
      99                 :            : #define VIRTIO_F_IN_ORDER 35
     100                 :            : 
     101                 :            : /*
     102                 :            :  * This feature indicates that memory accesses by the driver and the device
     103                 :            :  * are ordered in a way described by the platform.
     104                 :            :  */
     105                 :            : #define VIRTIO_F_ORDER_PLATFORM 36
     106                 :            : 
     107                 :            : /*
     108                 :            :  * This feature indicates that the driver passes extra data (besides
     109                 :            :  * identifying the virtqueue) in its device notifications.
     110                 :            :  */
     111                 :            : #define VIRTIO_F_NOTIFICATION_DATA 38
     112                 :            : 
     113                 :            : /* The Guest publishes the used index for which it expects an interrupt
     114                 :            :  * at the end of the avail ring. Host should ignore the avail->flags field.
     115                 :            :  */
     116                 :            : /* The Host publishes the avail index for which it expects a kick
     117                 :            :  * at the end of the used ring. Guest should ignore the used->flags field.
     118                 :            :  */
     119                 :            : #define VIRTIO_RING_F_EVENT_IDX         29
     120                 :            : 
     121                 :            : /* Common configuration */
     122                 :            : #define VIRTIO_PCI_CAP_COMMON_CFG       1
     123                 :            : /* Notifications */
     124                 :            : #define VIRTIO_PCI_CAP_NOTIFY_CFG       2
     125                 :            : /* ISR Status */
     126                 :            : #define VIRTIO_PCI_CAP_ISR_CFG          3
     127                 :            : /* Device specific configuration */
     128                 :            : #define VIRTIO_PCI_CAP_DEVICE_CFG       4
     129                 :            : /* PCI configuration access */
     130                 :            : #define VIRTIO_PCI_CAP_PCI_CFG          5
     131                 :            : 
     132                 :            : /* This is the PCI capability header: */
     133                 :            : struct virtio_pci_cap {
     134                 :            :         uint8_t cap_vndr;       /* Generic PCI field: PCI_CAP_ID_VNDR */
     135                 :            :         uint8_t cap_next;       /* Generic PCI field: next ptr. */
     136                 :            :         uint8_t cap_len;        /* Generic PCI field: capability length */
     137                 :            :         uint8_t cfg_type;       /* Identifies the structure. */
     138                 :            :         uint8_t bar;            /* Where to find it. */
     139                 :            :         uint8_t padding[3];     /* Pad to full dword. */
     140                 :            :         uint32_t offset;        /* Offset within bar. */
     141                 :            :         uint32_t length;        /* Length of the structure, in bytes. */
     142                 :            : };
     143                 :            : 
     144                 :            : struct virtio_pci_notify_cap {
     145                 :            :         struct virtio_pci_cap cap;
     146                 :            :         uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
     147                 :            : };
     148                 :            : 
     149                 :            : /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
     150                 :            : struct virtio_pci_common_cfg {
     151                 :            :         /* About the whole device. */
     152                 :            :         uint32_t device_feature_select; /* read-write */
     153                 :            :         uint32_t device_feature;        /* read-only */
     154                 :            :         uint32_t guest_feature_select;  /* read-write */
     155                 :            :         uint32_t guest_feature;         /* read-write */
     156                 :            :         uint16_t msix_config;           /* read-write */
     157                 :            :         uint16_t num_queues;            /* read-only */
     158                 :            :         uint8_t device_status;          /* read-write */
     159                 :            :         uint8_t config_generation;      /* read-only */
     160                 :            : 
     161                 :            :         /* About a specific virtqueue. */
     162                 :            :         uint16_t queue_select;          /* read-write */
     163                 :            :         uint16_t queue_size;            /* read-write, power of 2. */
     164                 :            :         uint16_t queue_msix_vector;     /* read-write */
     165                 :            :         uint16_t queue_enable;          /* read-write */
     166                 :            :         uint16_t queue_notify_off;      /* read-only */
     167                 :            :         uint32_t queue_desc_lo;         /* read-write */
     168                 :            :         uint32_t queue_desc_hi;         /* read-write */
     169                 :            :         uint32_t queue_avail_lo;        /* read-write */
     170                 :            :         uint32_t queue_avail_hi;        /* read-write */
     171                 :            :         uint32_t queue_used_lo;         /* read-write */
     172                 :            :         uint32_t queue_used_hi;         /* read-write */
     173                 :            : };
     174                 :            : 
     175                 :            : struct virtio_crypto_hw;
     176                 :            : 
     177                 :            : struct virtio_pci_ops {
     178                 :            :         void (*read_dev_cfg)(struct virtio_crypto_hw *hw, size_t offset,
     179                 :            :                              void *dst, int len);
     180                 :            :         void (*write_dev_cfg)(struct virtio_crypto_hw *hw, size_t offset,
     181                 :            :                               const void *src, int len);
     182                 :            :         void (*reset)(struct virtio_crypto_hw *hw);
     183                 :            : 
     184                 :            :         uint8_t (*get_status)(struct virtio_crypto_hw *hw);
     185                 :            :         void (*set_status)(struct virtio_crypto_hw *hw, uint8_t status);
     186                 :            : 
     187                 :            :         uint64_t (*get_features)(struct virtio_crypto_hw *hw);
     188                 :            :         void (*set_features)(struct virtio_crypto_hw *hw, uint64_t features);
     189                 :            : 
     190                 :            :         uint8_t (*get_isr)(struct virtio_crypto_hw *hw);
     191                 :            : 
     192                 :            :         uint16_t (*set_config_irq)(struct virtio_crypto_hw *hw, uint16_t vec);
     193                 :            : 
     194                 :            :         uint16_t (*set_queue_irq)(struct virtio_crypto_hw *hw,
     195                 :            :                         struct virtqueue *vq, uint16_t vec);
     196                 :            : 
     197                 :            :         uint16_t (*get_queue_num)(struct virtio_crypto_hw *hw,
     198                 :            :                         uint16_t queue_id);
     199                 :            :         int (*setup_queue)(struct virtio_crypto_hw *hw, struct virtqueue *vq);
     200                 :            :         void (*del_queue)(struct virtio_crypto_hw *hw, struct virtqueue *vq);
     201                 :            :         void (*notify_queue)(struct virtio_crypto_hw *hw, struct virtqueue *vq);
     202                 :            : };
     203                 :            : 
     204                 :            : struct virtio_crypto_hw {
     205                 :            :         struct virtqueue **vqs;
     206                 :            :         uint16_t    dev_id;
     207                 :            :         uint16_t    max_dataqueues;
     208                 :            :         uint64_t    req_guest_features;
     209                 :            :         uint64_t    guest_features;
     210                 :            :         uint8_t     use_msix;
     211                 :            :         uint8_t     modern;
     212                 :            :         uint32_t    notify_off_multiplier;
     213                 :            :         uint8_t     *isr;
     214                 :            :         uint16_t    *notify_base;
     215                 :            :         struct virtio_pci_common_cfg *common_cfg;
     216                 :            :         struct virtio_crypto_config *dev_cfg;
     217                 :            :         const struct rte_cryptodev_capabilities *virtio_dev_capabilities;
     218                 :            :         uint8_t weak_barriers;
     219                 :            :         struct virtcrypto_ctl *cvq;
     220                 :            :         bool use_va;
     221                 :            : };
     222                 :            : 
     223                 :            : /*
     224                 :            :  * While virtio_crypto_hw is stored in shared memory, this structure stores
     225                 :            :  * some infos that may vary in the multiple process model locally.
     226                 :            :  * For example, the vtpci_ops pointer.
     227                 :            :  */
     228                 :            : struct virtio_hw_internal {
     229                 :            :         const struct virtio_pci_ops *vtpci_ops;
     230                 :            :         struct rte_pci_ioport io;
     231                 :            : };
     232                 :            : 
     233                 :            : #define VTPCI_OPS(hw)   (crypto_virtio_hw_internal[(hw)->dev_id].vtpci_ops)
     234                 :            : #define VTPCI_IO(hw)    (&crypto_virtio_hw_internal[(hw)->dev_id].io)
     235                 :            : 
     236                 :            : extern struct virtio_hw_internal crypto_virtio_hw_internal[RTE_MAX_VIRTIO_CRYPTO];
     237                 :            : 
     238                 :            : /*
     239                 :            :  * How many bits to shift physical queue address written to QUEUE_PFN.
     240                 :            :  * 12 is historical, and due to x86 page size.
     241                 :            :  */
     242                 :            : #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
     243                 :            : 
     244                 :            : /* The alignment to use between consumer and producer parts of vring. */
     245                 :            : #define VIRTIO_PCI_VRING_ALIGN 4096
     246                 :            : 
     247                 :            : enum virtio_msix_status {
     248                 :            :         VIRTIO_MSIX_NONE = 0,
     249                 :            :         VIRTIO_MSIX_DISABLED = 1,
     250                 :            :         VIRTIO_MSIX_ENABLED = 2
     251                 :            : };
     252                 :            : 
     253                 :            : static inline int
     254                 :            : vtpci_with_feature(struct virtio_crypto_hw *hw, uint64_t bit)
     255                 :            : {
     256   [ #  #  #  #  :          0 :         return (hw->guest_features & (1ULL << bit)) != 0;
          #  #  #  #  #  
                #  #  # ]
     257                 :            : }
     258                 :            : 
     259                 :            : static inline int
     260                 :            : vtpci_with_packed_queue(struct virtio_crypto_hw *hw)
     261                 :            : {
     262                 :            :         return vtpci_with_feature(hw, VIRTIO_F_RING_PACKED);
     263                 :            : }
     264                 :            : 
     265                 :            : /*
     266                 :            :  * Function declaration from virtio_pci.c
     267                 :            :  */
     268                 :            : int vtpci_cryptodev_init(struct rte_pci_device *dev,
     269                 :            :         struct virtio_crypto_hw *hw);
     270                 :            : void vtpci_cryptodev_reset(struct virtio_crypto_hw *hw);
     271                 :            : 
     272                 :            : void vtpci_cryptodev_reinit_complete(struct virtio_crypto_hw *hw);
     273                 :            : 
     274                 :            : uint8_t vtpci_cryptodev_get_status(struct virtio_crypto_hw *hw);
     275                 :            : void vtpci_cryptodev_set_status(struct virtio_crypto_hw *hw, uint8_t status);
     276                 :            : 
     277                 :            : uint64_t vtpci_cryptodev_negotiate_features(struct virtio_crypto_hw *hw,
     278                 :            :         uint64_t host_features);
     279                 :            : 
     280                 :            : void vtpci_write_cryptodev_config(struct virtio_crypto_hw *hw, size_t offset,
     281                 :            :         const void *src, int length);
     282                 :            : 
     283                 :            : void vtpci_read_cryptodev_config(struct virtio_crypto_hw *hw, size_t offset,
     284                 :            :         void *dst, int length);
     285                 :            : 
     286                 :            : uint8_t vtpci_cryptodev_isr(struct virtio_crypto_hw *hw);
     287                 :            : 
     288                 :            : #endif /* _VIRTIO_PCI_H_ */

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