Branch data Line data Source code
1 : : /* SPDX-License-Identifier: BSD-3-Clause
2 : : * Copyright 2015 6WIND S.A.
3 : : * Copyright 2020 Mellanox Technologies, Ltd
4 : : */
5 : :
6 : : #include <stddef.h>
7 : : #include <unistd.h>
8 : : #include <string.h>
9 : : #include <stdint.h>
10 : : #include <stdlib.h>
11 : : #include <errno.h>
12 : : #include <net/if.h>
13 : : #include <linux/rtnetlink.h>
14 : : #include <linux/sockios.h>
15 : : #include <linux/ethtool.h>
16 : : #include <fcntl.h>
17 : :
18 : : #include <rte_malloc.h>
19 : : #include <ethdev_driver.h>
20 : : #include <ethdev_pci.h>
21 : : #include <rte_pci.h>
22 : : #include <bus_driver.h>
23 : : #include <bus_pci_driver.h>
24 : : #include <bus_auxiliary_driver.h>
25 : : #include <rte_common.h>
26 : : #include <rte_kvargs.h>
27 : : #include <rte_rwlock.h>
28 : : #include <rte_spinlock.h>
29 : : #include <rte_string_fns.h>
30 : : #include <rte_alarm.h>
31 : : #include <rte_eal_paging.h>
32 : :
33 : : #include <mlx5_glue.h>
34 : : #include <mlx5_devx_cmds.h>
35 : : #include <mlx5_common.h>
36 : : #include <mlx5_common_mp.h>
37 : : #include <mlx5_common_mr.h>
38 : : #include <mlx5_malloc.h>
39 : :
40 : : #include "mlx5_defs.h"
41 : : #include "mlx5.h"
42 : : #include "mlx5_common_os.h"
43 : : #include "mlx5_utils.h"
44 : : #include "mlx5_rxtx.h"
45 : : #include "mlx5_rx.h"
46 : : #include "mlx5_tx.h"
47 : : #include "mlx5_autoconf.h"
48 : : #include "mlx5_flow.h"
49 : : #include "rte_pmd_mlx5.h"
50 : : #include "mlx5_verbs.h"
51 : : #include "mlx5_nl.h"
52 : : #include "mlx5_devx.h"
53 : :
54 : : #ifndef HAVE_IBV_MLX5_MOD_MPW
55 : : #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
56 : : #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
57 : : #endif
58 : :
59 : : #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
60 : : #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
61 : : #endif
62 : :
63 : : static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
64 : :
65 : : /* Spinlock for mlx5_shared_data allocation. */
66 : : static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
67 : :
68 : : /* Process local data for secondary processes. */
69 : : static struct mlx5_local_data mlx5_local_data;
70 : :
71 : : /* rte flow indexed pool configuration. */
72 : : static const struct mlx5_indexed_pool_config default_icfg[] = {
73 : : {
74 : : .size = sizeof(struct rte_flow),
75 : : .trunk_size = 64,
76 : : .need_lock = 1,
77 : : .release_mem_en = 0,
78 : : .malloc = mlx5_malloc,
79 : : .free = mlx5_free,
80 : : .per_core_cache = 0,
81 : : .type = "ctl_flow_ipool",
82 : : },
83 : : {
84 : : .size = sizeof(struct rte_flow),
85 : : .trunk_size = 64,
86 : : .grow_trunk = 3,
87 : : .grow_shift = 2,
88 : : .need_lock = 1,
89 : : .release_mem_en = 0,
90 : : .malloc = mlx5_malloc,
91 : : .free = mlx5_free,
92 : : .per_core_cache = 1 << 14,
93 : : .type = "rte_flow_ipool",
94 : : },
95 : : {
96 : : .size = sizeof(struct rte_flow),
97 : : .trunk_size = 64,
98 : : .grow_trunk = 3,
99 : : .grow_shift = 2,
100 : : .need_lock = 1,
101 : : .release_mem_en = 0,
102 : : .malloc = mlx5_malloc,
103 : : .free = mlx5_free,
104 : : .per_core_cache = 0,
105 : : .type = "mcp_flow_ipool",
106 : : },
107 : : };
108 : :
109 : : /**
110 : : * Set the completion channel file descriptor interrupt as non-blocking.
111 : : *
112 : : * @param[in] rxq_obj
113 : : * Pointer to RQ channel object, which includes the channel fd
114 : : *
115 : : * @param[out] fd
116 : : * The file descriptor (representing the interrupt) used in this channel.
117 : : *
118 : : * @return
119 : : * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
120 : : */
121 : : int
122 : 0 : mlx5_os_set_nonblock_channel_fd(int fd)
123 : : {
124 : : int flags;
125 : :
126 : 0 : flags = fcntl(fd, F_GETFL);
127 : 0 : return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
128 : : }
129 : :
130 : : /**
131 : : * Get mlx5 device attributes. The glue function query_device_ex() is called
132 : : * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
133 : : * device attributes from the glue out parameter.
134 : : *
135 : : * @param sh
136 : : * Pointer to shared device context.
137 : : *
138 : : * @return
139 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
140 : : */
141 : : int
142 : 0 : mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
143 : : {
144 : : int err;
145 : 0 : struct mlx5_common_device *cdev = sh->cdev;
146 : 0 : struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
147 : 0 : struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
148 : 0 : struct mlx5dv_context dv_attr = { .comp_mask = 0 };
149 : :
150 : 0 : err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
151 [ # # ]: 0 : if (err) {
152 : 0 : rte_errno = errno;
153 : 0 : return -rte_errno;
154 : : }
155 : : #ifdef HAVE_IBV_MLX5_MOD_SWP
156 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
157 : : #endif
158 : : #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
159 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
160 : : #endif
161 : : #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
162 : 0 : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
163 : : #endif
164 : : #ifdef HAVE_IBV_DEVICE_ATTR_ESW_MGR_REG_C0
165 : : dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_REG_C0;
166 : : #endif
167 : 0 : err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
168 [ # # ]: 0 : if (err) {
169 : 0 : rte_errno = errno;
170 : 0 : return -rte_errno;
171 : : }
172 : 0 : memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
173 [ # # ]: 0 : if (mlx5_dev_is_pci(cdev->dev))
174 : 0 : sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
175 : : else
176 : 0 : sh->dev_cap.sf = 1;
177 : 0 : sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
178 : 0 : sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
179 : 0 : sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
180 : 0 : sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
181 : : #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
182 : 0 : sh->dev_cap.dest_tir = 1;
183 : : #endif
184 : : #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
185 : 0 : DRV_LOG(DEBUG, "DV flow is supported.");
186 : 0 : sh->dev_cap.dv_flow_en = 1;
187 : : #endif
188 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
189 [ # # # # ]: 0 : if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
190 : 0 : sh->dev_cap.dv_esw_en = 1;
191 : : #endif
192 : : /*
193 : : * Multi-packet send is supported by ConnectX-4 Lx PF as well
194 : : * as all ConnectX-5 devices.
195 : : */
196 [ # # ]: 0 : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
197 [ # # ]: 0 : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
198 : 0 : DRV_LOG(DEBUG, "Enhanced MPW is supported.");
199 : 0 : sh->dev_cap.mps = MLX5_MPW_ENHANCED;
200 : : } else {
201 : 0 : DRV_LOG(DEBUG, "MPW is supported.");
202 : 0 : sh->dev_cap.mps = MLX5_MPW;
203 : : }
204 : : } else {
205 : 0 : DRV_LOG(DEBUG, "MPW isn't supported.");
206 : 0 : sh->dev_cap.mps = MLX5_MPW_DISABLED;
207 : : }
208 : : #if (RTE_CACHE_LINE_SIZE == 128)
209 : : if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
210 : : sh->dev_cap.cqe_comp = 1;
211 : : DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
212 : : sh->dev_cap.cqe_comp ? "" : "not ");
213 : : #else
214 : 0 : sh->dev_cap.cqe_comp = 1;
215 : : #endif
216 : : #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
217 : 0 : sh->dev_cap.mpls_en =
218 : : ((dv_attr.tunnel_offloads_caps &
219 : 0 : MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
220 : : (dv_attr.tunnel_offloads_caps &
221 : : MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
222 [ # # ]: 0 : DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
223 : : sh->dev_cap.mpls_en ? "" : "not ");
224 : : #else
225 : : DRV_LOG(WARNING,
226 : : "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
227 : : #endif
228 : : #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
229 : : sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
230 : : #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
231 : 0 : sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
232 : : IBV_DEVICE_PCI_WRITE_END_PADDING);
233 : : #endif
234 : 0 : sh->dev_cap.hw_csum =
235 : 0 : !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
236 [ # # ]: 0 : DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
237 : : sh->dev_cap.hw_csum ? "" : "not ");
238 : 0 : sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
239 : : IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
240 [ # # ]: 0 : DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
241 : : (sh->dev_cap.hw_vlan_strip ? "" : "not "));
242 : 0 : sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
243 : : IBV_RAW_PACKET_CAP_SCATTER_FCS);
244 : : #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
245 : : !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
246 : : DRV_LOG(DEBUG, "Counters are not supported.");
247 : : #endif
248 : : /*
249 : : * DPDK doesn't support larger/variable indirection tables.
250 : : * Once DPDK supports it, take max size from device attr.
251 : : */
252 : 0 : sh->dev_cap.ind_table_max_size =
253 : 0 : RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
254 : : (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
255 : 0 : DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
256 : : sh->dev_cap.ind_table_max_size);
257 [ # # ]: 0 : sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
258 [ # # ]: 0 : (attr_ex.tso_caps.supported_qpts &
259 : : (1 << IBV_QPT_RAW_PACKET)));
260 [ # # ]: 0 : if (sh->dev_cap.tso)
261 : 0 : sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
262 [ # # ]: 0 : strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
263 : : sizeof(sh->dev_cap.fw_ver));
264 : : #ifdef HAVE_IBV_MLX5_MOD_SWP
265 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
266 : 0 : sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
267 : : (MLX5_SW_PARSING_CAP |
268 : : MLX5_SW_PARSING_CSUM_CAP |
269 : : MLX5_SW_PARSING_TSO_CAP);
270 : 0 : DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
271 : : #endif
272 : : #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
273 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
274 : : struct mlx5dv_striding_rq_caps *strd_rq_caps =
275 : : &dv_attr.striding_rq_caps;
276 : :
277 : 0 : sh->dev_cap.mprq.enabled = 1;
278 : 0 : sh->dev_cap.mprq.log_min_stride_size =
279 : 0 : strd_rq_caps->min_single_stride_log_num_of_bytes;
280 : 0 : sh->dev_cap.mprq.log_max_stride_size =
281 : 0 : strd_rq_caps->max_single_stride_log_num_of_bytes;
282 : 0 : sh->dev_cap.mprq.log_min_stride_num =
283 : 0 : strd_rq_caps->min_single_wqe_log_num_of_strides;
284 : 0 : sh->dev_cap.mprq.log_max_stride_num =
285 : 0 : strd_rq_caps->max_single_wqe_log_num_of_strides;
286 : 0 : sh->dev_cap.mprq.log_min_stride_wqe_size =
287 : 0 : cdev->config.devx ?
288 [ # # ]: 0 : hca_attr->log_min_stride_wqe_sz :
289 : : MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
290 : 0 : DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
291 : : sh->dev_cap.mprq.log_min_stride_size);
292 : 0 : DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
293 : : sh->dev_cap.mprq.log_max_stride_size);
294 : 0 : DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
295 : : sh->dev_cap.mprq.log_min_stride_num);
296 : 0 : DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
297 : : sh->dev_cap.mprq.log_max_stride_num);
298 : 0 : DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
299 : : sh->dev_cap.mprq.log_min_stride_wqe_size);
300 : 0 : DRV_LOG(DEBUG, "\tsupported_qpts: %d",
301 : : strd_rq_caps->supported_qpts);
302 : 0 : DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
303 : : }
304 : : #endif
305 : : #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
306 [ # # ]: 0 : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
307 : 0 : sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
308 : : (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
309 : : MLX5_TUNNELED_OFFLOADS_GRE_CAP |
310 : : MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
311 : : }
312 [ # # ]: 0 : if (sh->dev_cap.tunnel_en) {
313 [ # # # # : 0 : DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
# # ]
314 : : sh->dev_cap.tunnel_en &
315 : : MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
316 : : sh->dev_cap.tunnel_en &
317 : : MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
318 : : sh->dev_cap.tunnel_en &
319 : : MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
320 : : } else {
321 : 0 : DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
322 : : }
323 : : #else
324 : : DRV_LOG(WARNING,
325 : : "Tunnel offloading disabled due to old OFED/rdma-core version");
326 : : #endif
327 [ # # ]: 0 : if (!sh->cdev->config.devx)
328 : : return 0;
329 : : /* Check capabilities for Packet Pacing. */
330 : 0 : DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
331 : : hca_attr->dev_freq_khz);
332 [ # # ]: 0 : DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
333 : : hca_attr->qos.packet_pacing ? "" : "not ");
334 [ # # ]: 0 : DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
335 : : hca_attr->cross_channel ? "" : "not ");
336 [ # # ]: 0 : DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
337 : : hca_attr->wqe_index_ignore ? "" : "not ");
338 [ # # ]: 0 : DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
339 : : hca_attr->non_wire_sq ? "" : "not ");
340 [ # # ]: 0 : DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
341 : : hca_attr->log_max_static_sq_wq ? "" : "not ",
342 : : hca_attr->log_max_static_sq_wq);
343 [ # # ]: 0 : DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
344 : : hca_attr->qos.wqe_rate_pp ? "" : "not ");
345 : 0 : sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
346 [ # # ]: 0 : if (!hca_attr->cross_channel) {
347 : 0 : DRV_LOG(DEBUG,
348 : : "Cross channel operations are required for packet pacing.");
349 : 0 : sh->dev_cap.txpp_en = 0;
350 : : }
351 [ # # ]: 0 : if (!hca_attr->wqe_index_ignore) {
352 : 0 : DRV_LOG(DEBUG,
353 : : "WQE index ignore feature is required for packet pacing.");
354 : 0 : sh->dev_cap.txpp_en = 0;
355 : : }
356 [ # # ]: 0 : if (!hca_attr->non_wire_sq) {
357 : 0 : DRV_LOG(DEBUG,
358 : : "Non-wire SQ feature is required for packet pacing.");
359 : 0 : sh->dev_cap.txpp_en = 0;
360 : : }
361 [ # # ]: 0 : if (!hca_attr->log_max_static_sq_wq) {
362 : 0 : DRV_LOG(DEBUG,
363 : : "Static WQE SQ feature is required for packet pacing.");
364 : 0 : sh->dev_cap.txpp_en = 0;
365 : : }
366 [ # # ]: 0 : if (!hca_attr->qos.wqe_rate_pp) {
367 : 0 : DRV_LOG(DEBUG,
368 : : "WQE rate mode is required for packet pacing.");
369 : 0 : sh->dev_cap.txpp_en = 0;
370 : : }
371 : : #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
372 : : DRV_LOG(DEBUG,
373 : : "DevX does not provide UAR offset, can't create queues for packet pacing.");
374 : : sh->dev_cap.txpp_en = 0;
375 : : #endif
376 : 0 : sh->dev_cap.scatter_fcs_w_decap_disable =
377 : 0 : hca_attr->scatter_fcs_w_decap_disable;
378 : 0 : sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
379 : 0 : mlx5_rt_timestamp_config(sh, hca_attr);
380 : : #ifdef HAVE_IBV_DEVICE_ATTR_ESW_MGR_REG_C0
381 : : if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_REG_C0) {
382 : : sh->dev_cap.esw_info.regc_value = dv_attr.reg_c0.value;
383 : : sh->dev_cap.esw_info.regc_mask = dv_attr.reg_c0.mask;
384 : : }
385 : : #else
386 : 0 : sh->dev_cap.esw_info.regc_value = 0;
387 : 0 : sh->dev_cap.esw_info.regc_mask = 0;
388 : : #endif
389 : 0 : return 0;
390 : : }
391 : :
392 : : /**
393 : : * Detect misc5 support or not
394 : : *
395 : : * @param[in] priv
396 : : * Device private data pointer
397 : : */
398 : : #ifdef HAVE_MLX5DV_DR
399 : : static void
400 : 0 : __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
401 : : {
402 : : #ifdef HAVE_IBV_FLOW_DV_SUPPORT
403 : : /* Dummy VxLAN matcher to detect rdma-core misc5 cap
404 : : * Case: IPv4--->UDP--->VxLAN--->vni
405 : : */
406 : : void *tbl;
407 : : struct mlx5_flow_dv_match_params matcher_mask;
408 : : void *match_m;
409 : : void *matcher;
410 : : void *headers_m;
411 : : void *misc5_m;
412 : : uint32_t *tunnel_header_m;
413 : : struct mlx5dv_flow_matcher_attr dv_attr;
414 : :
415 : : memset(&matcher_mask, 0, sizeof(matcher_mask));
416 : 0 : matcher_mask.size = sizeof(matcher_mask.buf);
417 : : match_m = matcher_mask.buf;
418 : : headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
419 : : misc5_m = MLX5_ADDR_OF(fte_match_param,
420 : : match_m, misc_parameters_5);
421 : : tunnel_header_m = (uint32_t *)
422 : : MLX5_ADDR_OF(fte_match_set_misc5,
423 : : misc5_m, tunnel_header_1);
424 : : MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
425 [ # # ]: 0 : MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
426 : 0 : MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
427 : 0 : *tunnel_header_m = 0xffffff;
428 : :
429 : 0 : tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
430 [ # # ]: 0 : if (!tbl) {
431 : 0 : DRV_LOG(INFO, "No SW steering support");
432 : 0 : return;
433 : : }
434 : 0 : dv_attr.type = IBV_FLOW_ATTR_NORMAL,
435 : 0 : dv_attr.match_mask = (void *)&matcher_mask,
436 : 0 : dv_attr.match_criteria_enable =
437 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
438 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
439 : 0 : dv_attr.priority = 3;
440 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
441 : : void *misc2_m;
442 [ # # ]: 0 : if (priv->sh->config.dv_esw_en) {
443 : : /* FDB enabled reg_c_0 */
444 : 0 : dv_attr.match_criteria_enable |=
445 : : (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
446 : : misc2_m = MLX5_ADDR_OF(fte_match_param,
447 : : match_m, misc_parameters_2);
448 [ # # ]: 0 : MLX5_SET(fte_match_set_misc2, misc2_m,
449 : : metadata_reg_c_0, 0xffff);
450 : : }
451 : : #endif
452 : 0 : matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
453 : : &dv_attr, tbl);
454 [ # # ]: 0 : if (matcher) {
455 : 0 : priv->sh->misc5_cap = 1;
456 : 0 : mlx5_glue->dv_destroy_flow_matcher(matcher);
457 : : }
458 : 0 : mlx5_glue->dr_destroy_flow_tbl(tbl);
459 : : #else
460 : : RTE_SET_USED(priv);
461 : : #endif
462 : : }
463 : : #endif
464 : :
465 : : /**
466 : : * Initialize DR related data within private structure.
467 : : * Routine checks the reference counter and does actual
468 : : * resources creation/initialization only if counter is zero.
469 : : *
470 : : * @param[in] eth_dev
471 : : * Pointer to the device.
472 : : *
473 : : * @return
474 : : * Zero on success, positive error code otherwise.
475 : : */
476 : : static int
477 : 0 : mlx5_alloc_shared_dr(struct rte_eth_dev *eth_dev)
478 : : {
479 : 0 : struct mlx5_priv *priv = eth_dev->data->dev_private;
480 : 0 : struct mlx5_dev_ctx_shared *sh = priv->sh;
481 : : char s[MLX5_NAME_SIZE] __rte_unused;
482 : : int err;
483 : :
484 : : MLX5_ASSERT(sh && sh->refcnt);
485 [ # # ]: 0 : if (sh->refcnt > 1)
486 : : return 0;
487 : 0 : err = mlx5_alloc_table_hash_list(priv);
488 [ # # ]: 0 : if (err)
489 : 0 : goto error;
490 : 0 : sh->default_miss_action =
491 : 0 : mlx5_glue->dr_create_flow_action_default_miss();
492 [ # # ]: 0 : if (!sh->default_miss_action)
493 : 0 : DRV_LOG(WARNING, "Default miss action is not supported.");
494 : : /* The resources below are only valid with DV support. */
495 : : #ifdef HAVE_IBV_FLOW_DV_SUPPORT
496 : : /* Init shared flex parsers list, no need lcore_share */
497 : 0 : snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
498 : 0 : sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
499 : : mlx5_flex_parser_create_cb,
500 : : mlx5_flex_parser_match_cb,
501 : : mlx5_flex_parser_remove_cb,
502 : : mlx5_flex_parser_clone_cb,
503 : : mlx5_flex_parser_clone_free_cb);
504 [ # # ]: 0 : if (!sh->flex_parsers_dv)
505 : 0 : goto error;
506 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2) {
507 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
508 [ # # ]: 0 : sh->dv_regc0_mask) {
509 : : /* Reuse DV callback functions. */
510 : 0 : sh->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
511 : : MLX5_FLOW_MREG_HTABLE_SZ,
512 : : false, true, eth_dev,
513 : : flow_nta_mreg_create_cb,
514 : : flow_dv_mreg_match_cb,
515 : : flow_nta_mreg_remove_cb,
516 : : flow_dv_mreg_clone_cb,
517 : : flow_dv_mreg_clone_free_cb);
518 [ # # ]: 0 : if (!sh->mreg_cp_tbl) {
519 : : err = ENOMEM;
520 : 0 : goto error;
521 : : }
522 : : }
523 : 0 : return 0;
524 : : }
525 : : /* Init port id action list. */
526 : : snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
527 : 0 : sh->port_id_action_list = mlx5_list_create(s, sh, true,
528 : : flow_dv_port_id_create_cb,
529 : : flow_dv_port_id_match_cb,
530 : : flow_dv_port_id_remove_cb,
531 : : flow_dv_port_id_clone_cb,
532 : : flow_dv_port_id_clone_free_cb);
533 [ # # ]: 0 : if (!sh->port_id_action_list)
534 : 0 : goto error;
535 : : /* Init push vlan action list. */
536 : : snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
537 : 0 : sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
538 : : flow_dv_push_vlan_create_cb,
539 : : flow_dv_push_vlan_match_cb,
540 : : flow_dv_push_vlan_remove_cb,
541 : : flow_dv_push_vlan_clone_cb,
542 : : flow_dv_push_vlan_clone_free_cb);
543 [ # # ]: 0 : if (!sh->push_vlan_action_list)
544 : 0 : goto error;
545 : : /* Init sample action list. */
546 : : snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
547 : 0 : sh->sample_action_list = mlx5_list_create(s, sh, true,
548 : : flow_dv_sample_create_cb,
549 : : flow_dv_sample_match_cb,
550 : : flow_dv_sample_remove_cb,
551 : : flow_dv_sample_clone_cb,
552 : : flow_dv_sample_clone_free_cb);
553 [ # # ]: 0 : if (!sh->sample_action_list)
554 : 0 : goto error;
555 : : /* Init dest array action list. */
556 : : snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
557 : 0 : sh->dest_array_list = mlx5_list_create(s, sh, true,
558 : : flow_dv_dest_array_create_cb,
559 : : flow_dv_dest_array_match_cb,
560 : : flow_dv_dest_array_remove_cb,
561 : : flow_dv_dest_array_clone_cb,
562 : : flow_dv_dest_array_clone_free_cb);
563 [ # # ]: 0 : if (!sh->dest_array_list)
564 : 0 : goto error;
565 : : #else
566 : : if (priv->sh->config.dv_flow_en == 2)
567 : : return 0;
568 : : #endif
569 : : #ifdef HAVE_MLX5DV_DR
570 : : void *domain;
571 : :
572 : : /* Reference counter is zero, we should initialize structures. */
573 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
574 : : MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
575 [ # # ]: 0 : if (!domain) {
576 : 0 : DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
577 : 0 : err = errno;
578 : 0 : goto error;
579 : : }
580 : 0 : sh->rx_domain = domain;
581 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
582 : : MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
583 [ # # ]: 0 : if (!domain) {
584 : 0 : DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
585 : 0 : err = errno;
586 : 0 : goto error;
587 : : }
588 : 0 : sh->tx_domain = domain;
589 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
590 [ # # ]: 0 : if (sh->config.dv_esw_en) {
591 : 0 : domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
592 : : MLX5DV_DR_DOMAIN_TYPE_FDB);
593 [ # # ]: 0 : if (!domain) {
594 : 0 : DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
595 : 0 : err = errno;
596 : 0 : goto error;
597 : : }
598 : 0 : sh->fdb_domain = domain;
599 : : }
600 : : /*
601 : : * The drop action is just some dummy placeholder in rdma-core. It
602 : : * does not belong to domains and has no any attributes, and, can be
603 : : * shared by the entire device.
604 : : */
605 : 0 : sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
606 [ # # ]: 0 : if (!sh->dr_drop_action) {
607 : 0 : DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
608 : 0 : err = errno;
609 : 0 : goto error;
610 : : }
611 : :
612 [ # # ]: 0 : if (sh->config.dv_flow_en == 1) {
613 : : /* Query availability of metadata reg_c's. */
614 [ # # ]: 0 : if (!priv->sh->metadata_regc_check_flag) {
615 : 0 : err = mlx5_flow_discover_mreg_c(eth_dev);
616 [ # # ]: 0 : if (err < 0) {
617 : 0 : err = -err;
618 : 0 : goto error;
619 : : }
620 : : }
621 [ # # ]: 0 : if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
622 : 0 : DRV_LOG(DEBUG,
623 : : "port %u extensive metadata register is not supported",
624 : : eth_dev->data->port_id);
625 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
626 : 0 : DRV_LOG(ERR, "metadata mode %u is not supported "
627 : : "(no metadata registers available)",
628 : : sh->config.dv_xmeta_en);
629 : : err = ENOTSUP;
630 : 0 : goto error;
631 : : }
632 : : }
633 [ # # # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
634 [ # # ]: 0 : mlx5_flow_ext_mreg_supported(eth_dev) && sh->dv_regc0_mask) {
635 : 0 : sh->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
636 : : MLX5_FLOW_MREG_HTABLE_SZ,
637 : : false, true, eth_dev,
638 : : flow_dv_mreg_create_cb,
639 : : flow_dv_mreg_match_cb,
640 : : flow_dv_mreg_remove_cb,
641 : : flow_dv_mreg_clone_cb,
642 : : flow_dv_mreg_clone_free_cb);
643 [ # # ]: 0 : if (!sh->mreg_cp_tbl) {
644 : : err = ENOMEM;
645 : 0 : goto error;
646 : : }
647 : : }
648 : : }
649 : : #endif
650 [ # # # # ]: 0 : if (!sh->tunnel_hub && sh->config.dv_miss_info)
651 : 0 : err = mlx5_alloc_tunnel_hub(sh);
652 [ # # ]: 0 : if (err) {
653 : 0 : DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
654 : 0 : goto error;
655 : : }
656 [ # # ]: 0 : if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
657 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
658 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
659 [ # # ]: 0 : if (sh->fdb_domain)
660 : 0 : mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
661 : : }
662 : 0 : sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
663 [ # # ]: 0 : if (!sh->config.allow_duplicate_pattern) {
664 : : #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
665 : : DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
666 : : #endif
667 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
668 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
669 [ # # ]: 0 : if (sh->fdb_domain)
670 : 0 : mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
671 : : }
672 : :
673 : 0 : __mlx5_discovery_misc5_cap(priv);
674 : : #endif /* HAVE_MLX5DV_DR */
675 : 0 : LIST_INIT(&sh->shared_rxqs);
676 : 0 : return 0;
677 : 0 : error:
678 : : /* Rollback the created objects. */
679 [ # # ]: 0 : if (sh->rx_domain) {
680 : 0 : mlx5_glue->dr_destroy_domain(sh->rx_domain);
681 : 0 : sh->rx_domain = NULL;
682 : : }
683 [ # # ]: 0 : if (sh->tx_domain) {
684 : 0 : mlx5_glue->dr_destroy_domain(sh->tx_domain);
685 : 0 : sh->tx_domain = NULL;
686 : : }
687 [ # # ]: 0 : if (sh->fdb_domain) {
688 : 0 : mlx5_glue->dr_destroy_domain(sh->fdb_domain);
689 : 0 : sh->fdb_domain = NULL;
690 : : }
691 [ # # ]: 0 : if (sh->dr_drop_action) {
692 : 0 : mlx5_glue->destroy_flow_action(sh->dr_drop_action);
693 : 0 : sh->dr_drop_action = NULL;
694 : : }
695 [ # # ]: 0 : if (sh->pop_vlan_action) {
696 : 0 : mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
697 : 0 : sh->pop_vlan_action = NULL;
698 : : }
699 [ # # ]: 0 : if (sh->encaps_decaps) {
700 : 0 : mlx5_hlist_destroy(sh->encaps_decaps);
701 : 0 : sh->encaps_decaps = NULL;
702 : : }
703 [ # # ]: 0 : if (sh->modify_cmds) {
704 : 0 : mlx5_hlist_destroy(sh->modify_cmds);
705 : 0 : sh->modify_cmds = NULL;
706 : : }
707 [ # # ]: 0 : if (sh->tag_table) {
708 : : /* tags should be destroyed with flow before. */
709 : 0 : mlx5_hlist_destroy(sh->tag_table);
710 : 0 : sh->tag_table = NULL;
711 : : }
712 [ # # ]: 0 : if (sh->tunnel_hub) {
713 : 0 : mlx5_release_tunnel_hub(sh, priv->dev_port);
714 : 0 : sh->tunnel_hub = NULL;
715 : : }
716 : 0 : mlx5_free_table_hash_list(priv);
717 [ # # ]: 0 : if (sh->port_id_action_list) {
718 : 0 : mlx5_list_destroy(sh->port_id_action_list);
719 : 0 : sh->port_id_action_list = NULL;
720 : : }
721 [ # # ]: 0 : if (sh->push_vlan_action_list) {
722 : 0 : mlx5_list_destroy(sh->push_vlan_action_list);
723 : 0 : sh->push_vlan_action_list = NULL;
724 : : }
725 [ # # ]: 0 : if (sh->sample_action_list) {
726 : 0 : mlx5_list_destroy(sh->sample_action_list);
727 : 0 : sh->sample_action_list = NULL;
728 : : }
729 [ # # ]: 0 : if (sh->dest_array_list) {
730 : 0 : mlx5_list_destroy(sh->dest_array_list);
731 : 0 : sh->dest_array_list = NULL;
732 : : }
733 [ # # ]: 0 : if (sh->mreg_cp_tbl) {
734 : 0 : mlx5_hlist_destroy(sh->mreg_cp_tbl);
735 : 0 : sh->mreg_cp_tbl = NULL;
736 : : }
737 : : return err;
738 : : }
739 : :
740 : : /**
741 : : * Destroy DR related data within private structure.
742 : : *
743 : : * @param[in] priv
744 : : * Pointer to the private device data structure.
745 : : */
746 : : void
747 : 0 : mlx5_os_free_shared_dr(struct mlx5_priv *priv)
748 : : {
749 : 0 : struct mlx5_dev_ctx_shared *sh = priv->sh;
750 : : #ifdef HAVE_MLX5DV_DR
751 : : int i;
752 : : #endif
753 : :
754 : : MLX5_ASSERT(sh && sh->refcnt);
755 [ # # ]: 0 : if (sh->refcnt > 1)
756 : : return;
757 : : MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
758 : : #ifdef HAVE_MLX5DV_DR
759 [ # # ]: 0 : if (sh->rx_domain) {
760 : 0 : mlx5_glue->dr_destroy_domain(sh->rx_domain);
761 : 0 : sh->rx_domain = NULL;
762 : : }
763 [ # # ]: 0 : if (sh->tx_domain) {
764 : 0 : mlx5_glue->dr_destroy_domain(sh->tx_domain);
765 : 0 : sh->tx_domain = NULL;
766 : : }
767 : : #ifdef HAVE_MLX5DV_DR_ESWITCH
768 [ # # ]: 0 : if (sh->fdb_domain) {
769 : 0 : mlx5_glue->dr_destroy_domain(sh->fdb_domain);
770 : 0 : sh->fdb_domain = NULL;
771 : : }
772 [ # # ]: 0 : if (sh->dr_drop_action) {
773 : 0 : mlx5_glue->destroy_flow_action(sh->dr_drop_action);
774 : 0 : sh->dr_drop_action = NULL;
775 : : }
776 : : #endif
777 [ # # ]: 0 : if (sh->pop_vlan_action) {
778 : 0 : mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
779 : 0 : sh->pop_vlan_action = NULL;
780 : : }
781 [ # # ]: 0 : for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) {
782 [ # # ]: 0 : if (sh->send_to_kernel_action[i].action) {
783 : : void *action = sh->send_to_kernel_action[i].action;
784 : :
785 : 0 : mlx5_glue->destroy_flow_action(action);
786 : 0 : sh->send_to_kernel_action[i].action = NULL;
787 : : }
788 [ # # ]: 0 : if (sh->send_to_kernel_action[i].tbl) {
789 : : struct mlx5_flow_tbl_resource *tbl =
790 : : sh->send_to_kernel_action[i].tbl;
791 : :
792 : 0 : flow_dv_tbl_resource_release(sh, tbl);
793 : 0 : sh->send_to_kernel_action[i].tbl = NULL;
794 : : }
795 : : }
796 : : #endif /* HAVE_MLX5DV_DR */
797 [ # # ]: 0 : if (sh->default_miss_action)
798 : 0 : mlx5_glue->destroy_flow_action
799 : : (sh->default_miss_action);
800 [ # # ]: 0 : if (sh->encaps_decaps) {
801 : 0 : mlx5_hlist_destroy(sh->encaps_decaps);
802 : 0 : sh->encaps_decaps = NULL;
803 : : }
804 [ # # ]: 0 : if (sh->modify_cmds) {
805 : 0 : mlx5_hlist_destroy(sh->modify_cmds);
806 : 0 : sh->modify_cmds = NULL;
807 : : }
808 [ # # ]: 0 : if (sh->tag_table) {
809 : : /* tags should be destroyed with flow before. */
810 : 0 : mlx5_hlist_destroy(sh->tag_table);
811 : 0 : sh->tag_table = NULL;
812 : : }
813 [ # # ]: 0 : if (sh->tunnel_hub) {
814 : 0 : mlx5_release_tunnel_hub(sh, priv->dev_port);
815 : 0 : sh->tunnel_hub = NULL;
816 : : }
817 : 0 : mlx5_free_table_hash_list(priv);
818 [ # # ]: 0 : if (sh->port_id_action_list) {
819 : 0 : mlx5_list_destroy(sh->port_id_action_list);
820 : 0 : sh->port_id_action_list = NULL;
821 : : }
822 [ # # ]: 0 : if (sh->push_vlan_action_list) {
823 : 0 : mlx5_list_destroy(sh->push_vlan_action_list);
824 : 0 : sh->push_vlan_action_list = NULL;
825 : : }
826 [ # # ]: 0 : if (sh->sample_action_list) {
827 : 0 : mlx5_list_destroy(sh->sample_action_list);
828 : 0 : sh->sample_action_list = NULL;
829 : : }
830 [ # # ]: 0 : if (sh->dest_array_list) {
831 : 0 : mlx5_list_destroy(sh->dest_array_list);
832 : 0 : sh->dest_array_list = NULL;
833 : : }
834 [ # # ]: 0 : if (sh->mreg_cp_tbl) {
835 : 0 : mlx5_hlist_destroy(sh->mreg_cp_tbl);
836 : 0 : sh->mreg_cp_tbl = NULL;
837 : : }
838 : : }
839 : :
840 : : /**
841 : : * Initialize shared data between primary and secondary process.
842 : : *
843 : : * A memzone is reserved by primary process and secondary processes attach to
844 : : * the memzone.
845 : : *
846 : : * @return
847 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
848 : : */
849 : : static int
850 : 0 : mlx5_init_shared_data(void)
851 : : {
852 : : const struct rte_memzone *mz;
853 : : int ret = 0;
854 : :
855 : : rte_spinlock_lock(&mlx5_shared_data_lock);
856 [ # # ]: 0 : if (mlx5_shared_data == NULL) {
857 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
858 : : /* Allocate shared memory. */
859 : 0 : mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
860 : : sizeof(*mlx5_shared_data),
861 : : SOCKET_ID_ANY, 0);
862 [ # # ]: 0 : if (mz == NULL) {
863 : 0 : DRV_LOG(ERR,
864 : : "Cannot allocate mlx5 shared data");
865 : 0 : ret = -rte_errno;
866 : 0 : goto error;
867 : : }
868 : 0 : mlx5_shared_data = mz->addr;
869 : : memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
870 : 0 : rte_spinlock_init(&mlx5_shared_data->lock);
871 : : } else {
872 : : /* Lookup allocated shared memory. */
873 : 0 : mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
874 [ # # ]: 0 : if (mz == NULL) {
875 : 0 : DRV_LOG(ERR,
876 : : "Cannot attach mlx5 shared data");
877 : 0 : ret = -rte_errno;
878 : 0 : goto error;
879 : : }
880 : 0 : mlx5_shared_data = mz->addr;
881 : : memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
882 : : }
883 : : }
884 : 0 : error:
885 : : rte_spinlock_unlock(&mlx5_shared_data_lock);
886 : 0 : return ret;
887 : : }
888 : :
889 : : /**
890 : : * PMD global initialization.
891 : : *
892 : : * Independent from individual device, this function initializes global
893 : : * per-PMD data structures distinguishing primary and secondary processes.
894 : : * Hence, each initialization is called once per a process.
895 : : *
896 : : * @return
897 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
898 : : */
899 : : static int
900 : 0 : mlx5_init_once(void)
901 : : {
902 : : struct mlx5_shared_data *sd;
903 : : struct mlx5_local_data *ld = &mlx5_local_data;
904 : : int ret = 0;
905 : :
906 [ # # ]: 0 : if (mlx5_init_shared_data())
907 : 0 : return -rte_errno;
908 : 0 : sd = mlx5_shared_data;
909 : : MLX5_ASSERT(sd);
910 : 0 : rte_spinlock_lock(&sd->lock);
911 [ # # # ]: 0 : switch (rte_eal_process_type()) {
912 : 0 : case RTE_PROC_PRIMARY:
913 [ # # ]: 0 : if (sd->init_done)
914 : : break;
915 : 0 : ret = mlx5_mp_init_primary(MLX5_MP_NAME,
916 : : mlx5_mp_os_primary_handle);
917 [ # # ]: 0 : if (ret)
918 : 0 : goto out;
919 : 0 : sd->init_done = true;
920 : 0 : break;
921 : 0 : case RTE_PROC_SECONDARY:
922 [ # # ]: 0 : if (ld->init_done)
923 : : break;
924 : 0 : ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
925 : : mlx5_mp_os_secondary_handle);
926 [ # # ]: 0 : if (ret)
927 : 0 : goto out;
928 : 0 : ++sd->secondary_cnt;
929 : 0 : ld->init_done = true;
930 : 0 : break;
931 : : default:
932 : : break;
933 : : }
934 : 0 : out:
935 : : rte_spinlock_unlock(&sd->lock);
936 : 0 : return ret;
937 : : }
938 : :
939 : : /**
940 : : * DR flow drop action support detect.
941 : : *
942 : : * @param dev
943 : : * Pointer to rte_eth_dev structure.
944 : : *
945 : : */
946 : : static void
947 : 0 : mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
948 : : {
949 : : #ifdef HAVE_MLX5DV_DR
950 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
951 : :
952 [ # # # # ]: 0 : if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
953 : : return;
954 : : /**
955 : : * DR supports drop action placeholder when it is supported;
956 : : * otherwise, use the queue drop action.
957 : : */
958 [ # # ]: 0 : if (!priv->sh->drop_action_check_flag) {
959 [ # # ]: 0 : if (!mlx5_flow_discover_dr_action_support(dev))
960 : 0 : priv->sh->dr_root_drop_action_en = 1;
961 : 0 : priv->sh->drop_action_check_flag = 1;
962 : : }
963 [ # # ]: 0 : if (priv->sh->dr_root_drop_action_en)
964 : 0 : priv->root_drop_action = priv->sh->dr_drop_action;
965 : : else
966 : 0 : priv->root_drop_action = priv->drop_queue.hrxq->action;
967 : : #endif
968 : : }
969 : :
970 : : static void
971 : 0 : mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
972 : : {
973 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
974 : 0 : void *ctx = priv->sh->cdev->ctx;
975 : :
976 : 0 : priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
977 [ # # ]: 0 : if (!priv->q_counters) {
978 : 0 : struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
979 : : struct ibv_wq *wq;
980 : :
981 : 0 : DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
982 : : "by DevX - fall-back to use the kernel driver global "
983 : : "queue counter.", dev->data->port_id);
984 : 0 : priv->q_counters_allocation_failure = 1;
985 : :
986 : : /* Create WQ by kernel and query its queue counter ID. */
987 [ # # ]: 0 : if (cq) {
988 : 0 : wq = mlx5_glue->create_wq(ctx,
989 : 0 : &(struct ibv_wq_init_attr){
990 : : .wq_type = IBV_WQT_RQ,
991 : : .max_wr = 1,
992 : : .max_sge = 1,
993 : 0 : .pd = priv->sh->cdev->pd,
994 : : .cq = cq,
995 : : });
996 [ # # ]: 0 : if (wq) {
997 : : /* Counter is assigned only on RDY state. */
998 : 0 : int ret = mlx5_glue->modify_wq(wq,
999 : 0 : &(struct ibv_wq_attr){
1000 : : .attr_mask = IBV_WQ_ATTR_STATE,
1001 : : .wq_state = IBV_WQS_RDY,
1002 : : });
1003 : :
1004 [ # # ]: 0 : if (ret == 0)
1005 : 0 : mlx5_devx_cmd_wq_query(wq,
1006 : : &priv->counter_set_id);
1007 : 0 : claim_zero(mlx5_glue->destroy_wq(wq));
1008 : : }
1009 : 0 : claim_zero(mlx5_glue->destroy_cq(cq));
1010 : : }
1011 : : } else {
1012 : 0 : priv->counter_set_id = priv->q_counters->id;
1013 : : }
1014 [ # # ]: 0 : if (priv->counter_set_id == 0)
1015 : 0 : DRV_LOG(INFO, "Part of the port %d statistics will not be "
1016 : : "available.", dev->data->port_id);
1017 : 0 : }
1018 : :
1019 : : /**
1020 : : * Check if representor spawn info match devargs.
1021 : : *
1022 : : * @param spawn
1023 : : * Verbs device parameters (name, port, switch_info) to spawn.
1024 : : * @param eth_da
1025 : : * Device devargs to probe.
1026 : : *
1027 : : * @return
1028 : : * Match result.
1029 : : */
1030 : : static bool
1031 : 0 : mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
1032 : : struct rte_eth_devargs *eth_da)
1033 : : {
1034 : 0 : struct mlx5_switch_info *switch_info = &spawn->info;
1035 : : unsigned int p, f;
1036 : : uint16_t id;
1037 : 0 : uint16_t repr_id = mlx5_representor_id_encode(switch_info,
1038 : : eth_da->type);
1039 : :
1040 : : /*
1041 : : * Assuming Multiport E-Switch device was detected,
1042 : : * if spawned port is an uplink, check if the port
1043 : : * was requested through representor devarg.
1044 : : */
1045 [ # # ]: 0 : if (mlx5_is_probed_port_on_mpesw_device(spawn) &&
1046 [ # # ]: 0 : switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1047 [ # # ]: 0 : for (p = 0; p < eth_da->nb_ports; ++p)
1048 [ # # ]: 0 : if (switch_info->port_name == eth_da->ports[p])
1049 : : return true;
1050 : 0 : rte_errno = EBUSY;
1051 : 0 : return false;
1052 : : }
1053 [ # # # # : 0 : switch (eth_da->type) {
# ]
1054 : : case RTE_ETH_REPRESENTOR_PF:
1055 : : /*
1056 : : * PF representors provided in devargs translate to uplink ports, but
1057 : : * if and only if the device is a part of MPESW device.
1058 : : */
1059 [ # # ]: 0 : if (!mlx5_is_probed_port_on_mpesw_device(spawn)) {
1060 : 0 : rte_errno = EBUSY;
1061 : 0 : return false;
1062 : : }
1063 : : break;
1064 : 0 : case RTE_ETH_REPRESENTOR_SF:
1065 [ # # ]: 0 : if (!(spawn->info.port_name == -1 &&
1066 [ # # ]: 0 : switch_info->name_type ==
1067 : 0 : MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
1068 [ # # ]: 0 : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
1069 : 0 : rte_errno = EBUSY;
1070 : 0 : return false;
1071 : : }
1072 : : break;
1073 : 0 : case RTE_ETH_REPRESENTOR_VF:
1074 : : /* Allows HPF representor index -1 as exception. */
1075 [ # # ]: 0 : if (!(spawn->info.port_name == -1 &&
1076 [ # # ]: 0 : switch_info->name_type ==
1077 : 0 : MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
1078 [ # # ]: 0 : switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
1079 : 0 : rte_errno = EBUSY;
1080 : 0 : return false;
1081 : : }
1082 : : break;
1083 : 0 : case RTE_ETH_REPRESENTOR_NONE:
1084 : 0 : rte_errno = EBUSY;
1085 : 0 : return false;
1086 : 0 : default:
1087 : 0 : rte_errno = ENOTSUP;
1088 : 0 : DRV_LOG(ERR, "unsupported representor type");
1089 : 0 : return false;
1090 : : }
1091 : : /* Check representor ID: */
1092 [ # # ]: 0 : for (p = 0; p < eth_da->nb_ports; ++p) {
1093 [ # # # # ]: 0 : if (!mlx5_is_probed_port_on_mpesw_device(spawn) && spawn->pf_bond < 0) {
1094 : : /* For non-LAG mode, allow and ignore pf. */
1095 : 0 : switch_info->pf_num = eth_da->ports[p];
1096 : 0 : repr_id = mlx5_representor_id_encode(switch_info,
1097 : : eth_da->type);
1098 : : }
1099 [ # # ]: 0 : for (f = 0; f < eth_da->nb_representor_ports; ++f) {
1100 : 0 : id = MLX5_REPRESENTOR_ID
1101 : : (eth_da->ports[p], eth_da->type,
1102 : : eth_da->representor_ports[f]);
1103 [ # # ]: 0 : if (repr_id == id)
1104 : : return true;
1105 : : }
1106 : : }
1107 : 0 : rte_errno = EBUSY;
1108 : 0 : return false;
1109 : : }
1110 : :
1111 : : /**
1112 : : * Spawn an Ethernet device from Verbs information.
1113 : : *
1114 : : * @param dpdk_dev
1115 : : * Backing DPDK device.
1116 : : * @param spawn
1117 : : * Verbs device parameters (name, port, switch_info) to spawn.
1118 : : * @param eth_da
1119 : : * Device arguments.
1120 : : * @param mkvlist
1121 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
1122 : : *
1123 : : * @return
1124 : : * A valid Ethernet device object on success, NULL otherwise and rte_errno
1125 : : * is set. The following errors are defined:
1126 : : *
1127 : : * EBUSY: device is not supposed to be spawned.
1128 : : * EEXIST: device is already spawned
1129 : : */
1130 : : static struct rte_eth_dev *
1131 : 0 : mlx5_dev_spawn(struct rte_device *dpdk_dev,
1132 : : struct mlx5_dev_spawn_data *spawn,
1133 : : struct rte_eth_devargs *eth_da,
1134 : : struct mlx5_kvargs_ctrl *mkvlist)
1135 : : {
1136 : 0 : const struct mlx5_switch_info *switch_info = &spawn->info;
1137 : : struct mlx5_dev_ctx_shared *sh = NULL;
1138 : 0 : struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
1139 : : struct rte_eth_dev *eth_dev = NULL;
1140 : : struct mlx5_priv *priv = NULL;
1141 : : int err = 0;
1142 : : struct rte_ether_addr mac;
1143 : : char name[RTE_ETH_NAME_MAX_LEN];
1144 : : int own_domain_id = 0;
1145 : : uint16_t port_id;
1146 : 0 : struct mlx5_port_info vport_info = { .query_flags = 0 };
1147 : : int nl_rdma;
1148 : : int i;
1149 : : struct mlx5_indexed_pool_config icfg[RTE_DIM(default_icfg)];
1150 : :
1151 : : memcpy(icfg, default_icfg, sizeof(icfg));
1152 : : /* Determine if this port representor is supposed to be spawned. */
1153 [ # # # # : 0 : if (switch_info->representor && dpdk_dev->devargs &&
# # ]
1154 : 0 : !mlx5_representor_match(spawn, eth_da))
1155 : : return NULL;
1156 : : /* Build device name. */
1157 [ # # ]: 0 : if (spawn->pf_bond >= 0) {
1158 : : /* Bonding device. */
1159 [ # # ]: 0 : if (!switch_info->representor) {
1160 : 0 : err = snprintf(name, sizeof(name), "%s_%s",
1161 : : dpdk_dev->name, spawn->phys_dev_name);
1162 : : } else {
1163 : 0 : err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1164 : : dpdk_dev->name, spawn->phys_dev_name,
1165 : 0 : switch_info->ctrl_num,
1166 : 0 : switch_info->pf_num,
1167 : 0 : switch_info->name_type ==
1168 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1169 [ # # ]: 0 : switch_info->port_name);
1170 : : }
1171 [ # # ]: 0 : } else if (mlx5_is_probed_port_on_mpesw_device(spawn)) {
1172 : : /* MPESW device. */
1173 [ # # ]: 0 : if (switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1174 : 0 : err = snprintf(name, sizeof(name), "%s_p%d",
1175 : : dpdk_dev->name, spawn->mpesw_port);
1176 : : } else {
1177 : 0 : err = snprintf(name, sizeof(name), "%s_representor_c%dpf%d%s%u",
1178 : : dpdk_dev->name,
1179 : 0 : switch_info->ctrl_num,
1180 : 0 : switch_info->pf_num,
1181 : : switch_info->name_type ==
1182 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1183 [ # # ]: 0 : switch_info->port_name);
1184 : : }
1185 : : } else {
1186 : : /* Single device. */
1187 [ # # ]: 0 : if (!switch_info->representor)
1188 : 0 : strlcpy(name, dpdk_dev->name, sizeof(name));
1189 : : else
1190 : 0 : err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1191 : : dpdk_dev->name,
1192 : 0 : switch_info->name_type ==
1193 : : MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1194 [ # # ]: 0 : switch_info->port_name);
1195 : : }
1196 [ # # ]: 0 : if (err >= (int)sizeof(name))
1197 : 0 : DRV_LOG(WARNING, "device name overflow %s", name);
1198 : : /* check if the device is already spawned */
1199 [ # # ]: 0 : if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1200 : : /*
1201 : : * When device is already spawned, its devargs should be set
1202 : : * as used. otherwise, mlx5_kvargs_validate() will fail.
1203 : : */
1204 [ # # ]: 0 : if (mkvlist)
1205 : 0 : mlx5_port_args_set_used(name, port_id, mkvlist);
1206 : 0 : rte_errno = EEXIST;
1207 : 0 : return NULL;
1208 : : }
1209 : 0 : DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1210 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1211 : : struct mlx5_mp_id mp_id;
1212 : : int fd;
1213 : :
1214 : 0 : eth_dev = rte_eth_dev_attach_secondary(name);
1215 [ # # ]: 0 : if (eth_dev == NULL) {
1216 : 0 : DRV_LOG(ERR, "can not attach rte ethdev");
1217 : 0 : rte_errno = ENOMEM;
1218 : 0 : return NULL;
1219 : : }
1220 : 0 : eth_dev->device = dpdk_dev;
1221 : 0 : eth_dev->dev_ops = &mlx5_dev_sec_ops;
1222 : 0 : eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1223 : 0 : eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1224 : 0 : err = mlx5_proc_priv_init(eth_dev);
1225 [ # # ]: 0 : if (err)
1226 : : return NULL;
1227 : 0 : mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1228 : : /* Receive command fd from primary process */
1229 : 0 : fd = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1230 [ # # ]: 0 : if (fd < 0)
1231 : 0 : goto err_secondary;
1232 : : /* Remap UAR for Tx queues. */
1233 : 0 : err = mlx5_tx_uar_init_secondary(eth_dev, fd);
1234 : 0 : close(fd);
1235 [ # # ]: 0 : if (err)
1236 : 0 : goto err_secondary;
1237 : : /*
1238 : : * Ethdev pointer is still required as input since
1239 : : * the primary device is not accessible from the
1240 : : * secondary process.
1241 : : */
1242 : 0 : eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1243 : 0 : eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1244 : 0 : return eth_dev;
1245 : 0 : err_secondary:
1246 : 0 : mlx5_dev_close(eth_dev);
1247 : 0 : return NULL;
1248 : : }
1249 : 0 : sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);
1250 [ # # ]: 0 : if (!sh)
1251 : : return NULL;
1252 : 0 : nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
1253 : : /* Check port status. */
1254 [ # # ]: 0 : if (spawn->phys_port <= UINT8_MAX) {
1255 : : /* Legacy Verbs api only support u8 port number. */
1256 : 0 : err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1257 : : &port_attr);
1258 [ # # ]: 0 : if (err) {
1259 : 0 : DRV_LOG(ERR, "port query failed: %s", strerror(err));
1260 : 0 : goto error;
1261 : : }
1262 [ # # ]: 0 : if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1263 : 0 : DRV_LOG(ERR, "port is not configured in Ethernet mode");
1264 : : err = EINVAL;
1265 : 0 : goto error;
1266 : : }
1267 [ # # ]: 0 : } else if (nl_rdma >= 0) {
1268 : : /* IB doesn't allow more than 255 ports, must be Ethernet. */
1269 : 0 : err = mlx5_nl_port_state(nl_rdma,
1270 : : spawn->phys_dev_name,
1271 : : spawn->phys_port);
1272 [ # # ]: 0 : if (err < 0) {
1273 : 0 : DRV_LOG(INFO, "Failed to get netlink port state: %s",
1274 : : strerror(rte_errno));
1275 : 0 : err = -rte_errno;
1276 : 0 : goto error;
1277 : : }
1278 : 0 : port_attr.state = (enum ibv_port_state)err;
1279 : : }
1280 [ # # ]: 0 : if (port_attr.state != IBV_PORT_ACTIVE)
1281 : 0 : DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1282 : : mlx5_glue->port_state_str(port_attr.state),
1283 : : port_attr.state);
1284 : : /* Allocate private eth device data. */
1285 : 0 : priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1286 : : sizeof(*priv),
1287 : : RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1288 [ # # ]: 0 : if (priv == NULL) {
1289 : 0 : DRV_LOG(ERR, "priv allocation failure");
1290 : : err = ENOMEM;
1291 : 0 : goto error;
1292 : : }
1293 : : /*
1294 : : * When user configures remote PD and CTX and device creates RxQ by
1295 : : * DevX, external RxQ is both supported and requested.
1296 : : */
1297 [ # # # # : 0 : if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) {
# # ]
1298 : 0 : priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1299 : : sizeof(struct mlx5_external_q) *
1300 : : MLX5_MAX_EXT_RX_QUEUES, 0,
1301 : : SOCKET_ID_ANY);
1302 [ # # ]: 0 : if (priv->ext_rxqs == NULL) {
1303 : 0 : DRV_LOG(ERR, "Fail to allocate external RxQ array.");
1304 : : err = ENOMEM;
1305 : 0 : goto error;
1306 : : }
1307 : 0 : priv->ext_txqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1308 : : sizeof(struct mlx5_external_q) *
1309 : : MLX5_MAX_EXT_TX_QUEUES, 0,
1310 : : SOCKET_ID_ANY);
1311 [ # # ]: 0 : if (priv->ext_txqs == NULL) {
1312 : 0 : DRV_LOG(ERR, "Fail to allocate external TxQ array.");
1313 : : err = ENOMEM;
1314 : 0 : goto error;
1315 : : }
1316 : 0 : DRV_LOG(DEBUG, "External queue is supported.");
1317 : : }
1318 : 0 : priv->sh = sh;
1319 : 0 : priv->dev_port = spawn->phys_port;
1320 : 0 : priv->pci_dev = spawn->pci_dev;
1321 : 0 : priv->mtu = RTE_ETHER_MTU;
1322 : : /* Some internal functions rely on Netlink sockets, open them now. */
1323 : 0 : priv->nl_socket_rdma = nl_rdma;
1324 : 0 : priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0);
1325 : 0 : priv->representor = !!switch_info->representor;
1326 : 0 : priv->master = !!switch_info->master;
1327 : 0 : priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1328 : 0 : priv->vport_meta_tag = 0;
1329 : 0 : priv->vport_meta_mask = 0;
1330 : 0 : priv->pf_bond = spawn->pf_bond;
1331 : 0 : priv->mpesw_port = spawn->mpesw_port;
1332 : 0 : priv->mpesw_uplink = false;
1333 : 0 : priv->mpesw_owner = spawn->info.mpesw_owner;
1334 [ # # ]: 0 : if (mlx5_is_port_on_mpesw_device(priv))
1335 : 0 : priv->mpesw_uplink = (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK);
1336 : :
1337 [ # # ]: 0 : DRV_LOG(DEBUG,
1338 : : "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d "
1339 : : "mpesw_port=%d mpesw_uplink=%d",
1340 : : priv->dev_port, dpdk_dev->bus->name,
1341 : : priv->pci_dev ? priv->pci_dev->name : "NONE",
1342 : : priv->master, priv->representor, priv->pf_bond,
1343 : : priv->mpesw_port, priv->mpesw_uplink);
1344 : :
1345 [ # # # # ]: 0 : if (mlx5_is_port_on_mpesw_device(priv) && priv->sh->config.dv_flow_en != 2) {
1346 : 0 : DRV_LOG(ERR, "MPESW device is supported only with HWS");
1347 : : err = ENOTSUP;
1348 : 0 : goto error;
1349 : : }
1350 : : /*
1351 : : * If we have E-Switch we should determine the vport attributes.
1352 : : * E-Switch may use either source vport field or reg_c[0] metadata
1353 : : * register to match on vport index. The engaged part of metadata
1354 : : * register is defined by mask.
1355 : : */
1356 [ # # ]: 0 : if (sh->esw_mode) {
1357 : 0 : err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1358 : : spawn->phys_port,
1359 : : &vport_info);
1360 [ # # ]: 0 : if (err) {
1361 : 0 : DRV_LOG(WARNING,
1362 : : "Cannot query devx port %d on device %s",
1363 : : spawn->phys_port, spawn->phys_dev_name);
1364 : 0 : vport_info.query_flags = 0;
1365 : : }
1366 : : }
1367 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1368 : 0 : priv->vport_meta_tag = vport_info.vport_meta_tag;
1369 : 0 : priv->vport_meta_mask = vport_info.vport_meta_mask;
1370 [ # # ]: 0 : if (!priv->vport_meta_mask) {
1371 : 0 : DRV_LOG(ERR,
1372 : : "vport zero mask for port %d on bonding device %s",
1373 : : spawn->phys_port, spawn->phys_dev_name);
1374 : : err = ENOTSUP;
1375 : 0 : goto error;
1376 : : }
1377 [ # # ]: 0 : if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1378 : 0 : DRV_LOG(ERR,
1379 : : "Invalid vport tag for port %d on bonding device %s",
1380 : : spawn->phys_port, spawn->phys_dev_name);
1381 : : err = ENOTSUP;
1382 : 0 : goto error;
1383 : : }
1384 : : }
1385 [ # # ]: 0 : if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1386 : 0 : priv->vport_id = vport_info.vport_id;
1387 [ # # # # ]: 0 : } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1388 : 0 : DRV_LOG(ERR,
1389 : : "Cannot deduce vport index for port %d on bonding device %s",
1390 : : spawn->phys_port, spawn->phys_dev_name);
1391 : : err = ENOTSUP;
1392 : 0 : goto error;
1393 : : } else {
1394 : : /*
1395 : : * Suppose vport index in compatible way. Kernel/rdma_core
1396 : : * support single E-Switch per PF configurations only and
1397 : : * vport_id field contains the vport index for associated VF,
1398 : : * which is deduced from representor port name.
1399 : : * For example, let's have the IB device port 10, it has
1400 : : * attached network device eth0, which has port name attribute
1401 : : * pf0vf2, we can deduce the VF number as 2, and set vport index
1402 : : * as 3 (2+1). This assigning schema should be changed if the
1403 : : * multiple E-Switch instances per PF configurations or/and PCI
1404 : : * subfunctions are added.
1405 : : */
1406 [ # # ]: 0 : priv->vport_id = switch_info->representor ?
1407 : 0 : switch_info->port_name + 1 : -1;
1408 : : }
1409 : 0 : priv->representor_id = mlx5_representor_id_encode(switch_info,
1410 : : eth_da->type);
1411 : : /*
1412 : : * Look for sibling devices in order to reuse their switch domain
1413 : : * if any, otherwise allocate one.
1414 : : */
1415 [ # # ]: 0 : MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1416 : 0 : const struct mlx5_priv *opriv =
1417 : 0 : rte_eth_devices[port_id].data->dev_private;
1418 : :
1419 [ # # ]: 0 : if (!opriv ||
1420 [ # # ]: 0 : opriv->sh != priv->sh ||
1421 [ # # ]: 0 : opriv->domain_id ==
1422 : : RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1423 : : continue;
1424 : 0 : priv->domain_id = opriv->domain_id;
1425 : 0 : DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1426 : : priv->dev_port, priv->domain_id);
1427 : 0 : break;
1428 : : }
1429 [ # # ]: 0 : if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1430 : 0 : err = rte_eth_switch_domain_alloc(&priv->domain_id);
1431 [ # # ]: 0 : if (err) {
1432 : 0 : err = rte_errno;
1433 : 0 : DRV_LOG(ERR, "unable to allocate switch domain: %s",
1434 : : strerror(rte_errno));
1435 : 0 : goto error;
1436 : : }
1437 : : own_domain_id = 1;
1438 : 0 : DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1439 : : priv->dev_port, priv->domain_id);
1440 : : }
1441 [ # # ]: 0 : if (sh->cdev->config.devx) {
1442 : : struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
1443 : :
1444 : 0 : sh->steering_format_version = hca_attr->steering_format_version;
1445 : : #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
1446 [ # # # # ]: 0 : if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1447 : : sh->config.dv_flow_en) {
1448 [ # # ]: 0 : if (sh->registers.aso_reg != REG_NON) {
1449 : 0 : priv->mtr_en = 1;
1450 : 0 : priv->mtr_reg_share = hca_attr->qos.flow_meter;
1451 : : }
1452 : : }
1453 [ # # ]: 0 : if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1454 : : uint32_t log_obj_size =
1455 : : rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1456 : 0 : if (log_obj_size >=
1457 [ # # ]: 0 : hca_attr->qos.log_meter_aso_granularity &&
1458 : : log_obj_size <=
1459 [ # # ]: 0 : hca_attr->qos.log_meter_aso_max_alloc)
1460 : 0 : sh->meter_aso_en = 1;
1461 : : }
1462 [ # # ]: 0 : if (priv->mtr_en) {
1463 : 0 : err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1464 [ # # ]: 0 : if (err) {
1465 : 0 : err = -err;
1466 : 0 : goto error;
1467 : : }
1468 : : }
1469 [ # # ]: 0 : if (hca_attr->flow.tunnel_header_0_1)
1470 : 0 : sh->tunnel_header_0_1 = 1;
1471 [ # # ]: 0 : if (hca_attr->flow.tunnel_header_2_3)
1472 : 0 : sh->tunnel_header_2_3 = 1;
1473 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
1474 : : #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1475 [ # # # # ]: 0 : if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) {
1476 : 0 : sh->flow_hit_aso_en = 1;
1477 : 0 : err = mlx5_flow_aso_age_mng_init(sh);
1478 [ # # ]: 0 : if (err) {
1479 : 0 : err = -err;
1480 : 0 : goto error;
1481 : : }
1482 : 0 : DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1483 : : }
1484 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1485 : : #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1486 : : defined (HAVE_MLX5_DR_ACTION_ASO_CT)
1487 : : /* HWS create CT ASO SQ based on HWS configure queue number. */
1488 [ # # # # ]: 0 : if (sh->config.dv_flow_en != 2 &&
1489 [ # # ]: 0 : hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) {
1490 : 0 : err = mlx5_flow_aso_ct_mng_init(sh);
1491 [ # # ]: 0 : if (err) {
1492 : 0 : err = -err;
1493 : 0 : goto error;
1494 : : }
1495 : 0 : DRV_LOG(DEBUG, "CT ASO is supported.");
1496 : 0 : sh->ct_aso_en = 1;
1497 : : }
1498 : : #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1499 : : #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1500 [ # # # # ]: 0 : if (hca_attr->log_max_ft_sampler_num > 0 &&
1501 : : sh->config.dv_flow_en) {
1502 : 0 : priv->sampler_en = 1;
1503 : 0 : DRV_LOG(DEBUG, "Sampler enabled!");
1504 : : } else {
1505 : 0 : priv->sampler_en = 0;
1506 [ # # ]: 0 : if (!hca_attr->log_max_ft_sampler_num)
1507 : 0 : DRV_LOG(WARNING,
1508 : : "No available register for sampler.");
1509 : : else
1510 : 0 : DRV_LOG(DEBUG, "DV flow is not supported!");
1511 : : }
1512 : : #endif
1513 [ # # ]: 0 : if (hca_attr->lag_rx_port_affinity) {
1514 : 0 : sh->lag_rx_port_affinity_en = 1;
1515 : 0 : DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled");
1516 : : }
1517 : 0 : priv->num_lag_ports = hca_attr->num_lag_ports;
1518 : 0 : DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports);
1519 : : }
1520 : : /* Process parameters and store port configuration on priv structure. */
1521 : 0 : err = mlx5_port_args_config(priv, mkvlist, &priv->config);
1522 [ # # ]: 0 : if (err) {
1523 : 0 : err = rte_errno;
1524 : 0 : DRV_LOG(ERR, "Failed to process port configure: %s",
1525 : : strerror(rte_errno));
1526 : 0 : goto error;
1527 : : }
1528 : 0 : eth_dev = rte_eth_dev_allocate(name);
1529 [ # # ]: 0 : if (eth_dev == NULL) {
1530 : 0 : DRV_LOG(ERR, "can not allocate rte ethdev");
1531 : : err = ENOMEM;
1532 : 0 : goto error;
1533 : : }
1534 [ # # ]: 0 : if (priv->representor) {
1535 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1536 : 0 : eth_dev->data->representor_id = priv->representor_id;
1537 [ # # ]: 0 : MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1538 : 0 : struct mlx5_priv *opriv =
1539 : 0 : rte_eth_devices[port_id].data->dev_private;
1540 [ # # # # ]: 0 : if (opriv &&
1541 : 0 : opriv->master &&
1542 [ # # ]: 0 : opriv->domain_id == priv->domain_id &&
1543 [ # # ]: 0 : opriv->sh == priv->sh) {
1544 : 0 : eth_dev->data->backer_port_id = port_id;
1545 : 0 : break;
1546 : : }
1547 : : }
1548 [ # # ]: 0 : if (port_id >= RTE_MAX_ETHPORTS)
1549 : 0 : eth_dev->data->backer_port_id = eth_dev->data->port_id;
1550 : : }
1551 : 0 : priv->mp_id.port_id = eth_dev->data->port_id;
1552 : 0 : strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1553 : : /*
1554 : : * Store associated network device interface index. This index
1555 : : * is permanent throughout the lifetime of device. So, we may store
1556 : : * the ifindex here and use the cached value further.
1557 : : */
1558 : : MLX5_ASSERT(spawn->ifindex);
1559 : 0 : priv->if_index = spawn->ifindex;
1560 : 0 : priv->lag_affinity_idx = sh->refcnt - 1;
1561 : 0 : eth_dev->data->dev_private = priv;
1562 : 0 : priv->dev_data = eth_dev->data;
1563 : 0 : eth_dev->data->mac_addrs = priv->mac;
1564 : 0 : eth_dev->device = dpdk_dev;
1565 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1566 : : /* Configure the first MAC address by default. */
1567 [ # # ]: 0 : if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1568 : 0 : DRV_LOG(ERR,
1569 : : "port %u cannot get MAC address, is mlx5_en"
1570 : : " loaded? (errno: %s)",
1571 : : eth_dev->data->port_id, strerror(rte_errno));
1572 : : err = ENODEV;
1573 : 0 : goto error;
1574 : : }
1575 : 0 : DRV_LOG(INFO,
1576 : : "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1577 : : eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1578 : : #ifdef RTE_LIBRTE_MLX5_DEBUG
1579 : : {
1580 : : char ifname[MLX5_NAMESIZE];
1581 : :
1582 : : if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1583 : : DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1584 : : eth_dev->data->port_id, ifname);
1585 : : else
1586 : : DRV_LOG(DEBUG, "port %u ifname is unknown",
1587 : : eth_dev->data->port_id);
1588 : : }
1589 : : #endif
1590 : : /* Get actual MTU if possible. */
1591 : 0 : err = mlx5_get_mtu(eth_dev, &priv->mtu);
1592 [ # # ]: 0 : if (err) {
1593 : 0 : err = rte_errno;
1594 : 0 : goto error;
1595 : : }
1596 : 0 : DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1597 : : priv->mtu);
1598 : : /* Initialize burst functions to prevent crashes before link-up. */
1599 : 0 : eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1600 : 0 : eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1601 : 0 : eth_dev->dev_ops = &mlx5_dev_ops;
1602 : 0 : eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1603 : 0 : eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1604 : 0 : eth_dev->rx_queue_count = mlx5_rx_queue_count;
1605 : : /* Register MAC address. */
1606 : 0 : claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1607 [ # # # # ]: 0 : if (sh->dev_cap.vf && sh->config.vf_nl_en)
1608 : 0 : mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1609 : : mlx5_ifindex(eth_dev),
1610 : 0 : eth_dev->data->mac_addrs,
1611 : : MLX5_MAX_MAC_ADDRESSES);
1612 [ # # ]: 0 : priv->ctrl_flows = 0;
1613 : : rte_spinlock_init(&priv->flow_list_lock);
1614 : 0 : TAILQ_INIT(&priv->flow_meters);
1615 [ # # ]: 0 : if (priv->mtr_en) {
1616 : 0 : priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1617 [ # # ]: 0 : if (!priv->mtr_profile_tbl)
1618 : 0 : goto error;
1619 : : }
1620 : : /* Bring Ethernet device up. */
1621 : 0 : DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1622 : : eth_dev->data->port_id);
1623 : : /* Read link status in case it is up and there will be no event. */
1624 : 0 : mlx5_link_update(eth_dev, 0);
1625 : : /* Watch LSC interrupts between port probe and port start. */
1626 : 0 : priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
1627 : 0 : eth_dev->data->port_id;
1628 : 0 : mlx5_set_link_up(eth_dev);
1629 [ # # ]: 0 : for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1630 : 0 : icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1631 [ # # ]: 0 : if (sh->config.reclaim_mode)
1632 : 0 : icfg[i].per_core_cache = 0;
1633 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1634 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2)
1635 : 0 : icfg[i].size = sizeof(struct rte_flow_hw) + sizeof(struct rte_flow_nt2hws);
1636 : : #endif
1637 : 0 : priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1638 [ # # ]: 0 : if (!priv->flows[i])
1639 : 0 : goto error;
1640 : : }
1641 : : /* Create context for virtual machine VLAN workaround. */
1642 [ # # ]: 0 : priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1643 [ # # ]: 0 : if (mlx5_devx_obj_ops_en(sh)) {
1644 : 0 : priv->obj_ops = devx_obj_ops;
1645 : 0 : mlx5_queue_counter_id_prepare(eth_dev);
1646 : 0 : priv->obj_ops.lb_dummy_queue_create =
1647 : : mlx5_rxq_ibv_obj_dummy_lb_create;
1648 : 0 : priv->obj_ops.lb_dummy_queue_release =
1649 : : mlx5_rxq_ibv_obj_dummy_lb_release;
1650 [ # # ]: 0 : } else if (spawn->max_port > UINT8_MAX) {
1651 : : /* Verbs can't support ports larger than 255 by design. */
1652 : 0 : DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1653 : : err = ENOTSUP;
1654 : 0 : goto error;
1655 : : } else {
1656 : 0 : priv->obj_ops = ibv_obj_ops;
1657 : : }
1658 [ # # ]: 0 : if (sh->config.tx_pp &&
1659 [ # # ]: 0 : priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1660 : : /*
1661 : : * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1662 : : * packet pacing and already checked above.
1663 : : * Hence, we should only make sure the SQs will be created
1664 : : * with DevX, not with Verbs.
1665 : : * Verbs allocates the SQ UAR on its own and it can't be shared
1666 : : * with Clock Queue UAR as required for Tx scheduling.
1667 : : */
1668 : 0 : DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1669 : : err = ENODEV;
1670 : 0 : goto error;
1671 : : }
1672 : 0 : priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1673 [ # # ]: 0 : if (!priv->drop_queue.hrxq)
1674 : 0 : goto error;
1675 : 0 : priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1676 : : mlx5_hrxq_create_cb,
1677 : : mlx5_hrxq_match_cb,
1678 : : mlx5_hrxq_remove_cb,
1679 : : mlx5_hrxq_clone_cb,
1680 : : mlx5_hrxq_clone_free_cb);
1681 [ # # ]: 0 : if (!priv->hrxqs)
1682 : 0 : goto error;
1683 : 0 : mlx5_set_metadata_mask(eth_dev);
1684 [ # # ]: 0 : if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1685 [ # # ]: 0 : !priv->sh->dv_regc0_mask) {
1686 : 0 : DRV_LOG(ERR, "metadata mode %u is not supported "
1687 : : "(no metadata reg_c[0] is available)",
1688 : : sh->config.dv_xmeta_en);
1689 : : err = ENOTSUP;
1690 : 0 : goto error;
1691 : : }
1692 : : rte_rwlock_init(&priv->ind_tbls_lock);
1693 [ # # ]: 0 : if (sh->config.dv_flow_en) {
1694 : 0 : err = mlx5_alloc_shared_dr(eth_dev);
1695 [ # # ]: 0 : if (err)
1696 : 0 : goto error;
1697 [ # # ]: 0 : if (mlx5_flex_item_port_init(eth_dev) < 0)
1698 : 0 : goto error;
1699 : : }
1700 [ # # ]: 0 : if (sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_UNKNOWN) {
1701 : 0 : sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_OK;
1702 [ # # ]: 0 : if (!sh->cdev->config.hca_attr.modify_outer_ipv6_traffic_class ||
1703 [ # # # # ]: 0 : (sh->config.dv_flow_en == 1 && mlx5_flow_discover_ipv6_tc_support(eth_dev)))
1704 : 0 : sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_FALLBACK;
1705 : : }
1706 : : rte_spinlock_init(&priv->hw_ctrl_lock);
1707 : 0 : LIST_INIT(&priv->hw_ctrl_flows);
1708 : 0 : LIST_INIT(&priv->hw_ext_ctrl_flows);
1709 [ # # ]: 0 : if (priv->sh->config.dv_flow_en == 2) {
1710 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1711 [ # # ]: 0 : if (priv->sh->config.dv_esw_en) {
1712 : : uint32_t usable_bits;
1713 : : uint32_t required_bits;
1714 : :
1715 [ # # ]: 0 : if (priv->sh->dv_regc0_mask == UINT32_MAX) {
1716 : 0 : DRV_LOG(ERR, "E-Switch port metadata is required when using HWS "
1717 : : "but it is disabled (configure it through devlink)");
1718 : : err = ENOTSUP;
1719 : 0 : goto error;
1720 : : }
1721 [ # # ]: 0 : if (priv->sh->dv_regc0_mask == 0) {
1722 : 0 : DRV_LOG(ERR, "E-Switch with HWS is not supported "
1723 : : "(no available bits in reg_c[0])");
1724 : : err = ENOTSUP;
1725 : 0 : goto error;
1726 : : }
1727 : : usable_bits = rte_popcount32(priv->sh->dv_regc0_mask);
1728 : 0 : required_bits = rte_popcount32(priv->vport_meta_mask);
1729 [ # # ]: 0 : if (usable_bits < required_bits) {
1730 : 0 : DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide "
1731 : : "representor matching.");
1732 : : err = ENOTSUP;
1733 : 0 : goto error;
1734 : : }
1735 : : }
1736 [ # # ]: 0 : if (priv->vport_meta_mask)
1737 : 0 : flow_hw_set_port_info(eth_dev);
1738 [ # # ]: 0 : if (priv->sh->config.dv_esw_en &&
1739 [ # # # # ]: 0 : priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1740 : : priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) {
1741 : 0 : DRV_LOG(ERR,
1742 : : "metadata mode %u is not supported in HWS eswitch mode",
1743 : : priv->sh->config.dv_xmeta_en);
1744 : : err = ENOTSUP;
1745 : 0 : goto error;
1746 : : }
1747 [ # # # # ]: 0 : if (priv->sh->config.dv_esw_en &&
1748 : 0 : flow_hw_create_vport_action(eth_dev)) {
1749 : 0 : DRV_LOG(ERR, "port %u failed to create vport action",
1750 : : eth_dev->data->port_id);
1751 : : err = EINVAL;
1752 : 0 : goto error;
1753 : : }
1754 : : /*
1755 : : * If representor matching is disabled, PMD cannot create default flow rules
1756 : : * to receive traffic for all ports, since implicit source port match is not added.
1757 : : * Isolated mode is forced.
1758 : : */
1759 [ # # # # ]: 0 : if (priv->sh->config.dv_esw_en && !priv->sh->config.repr_matching) {
1760 : 0 : err = mlx5_flow_isolate(eth_dev, 1, NULL);
1761 [ # # ]: 0 : if (err < 0) {
1762 : 0 : err = -err;
1763 : 0 : goto error;
1764 : : }
1765 : 0 : DRV_LOG(WARNING, "port %u ingress traffic is restricted to defined "
1766 : : "flow rules (isolated mode) since representor "
1767 : : "matching is disabled",
1768 : : eth_dev->data->port_id);
1769 : : }
1770 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1771 : 0 : return eth_dev;
1772 : : #else
1773 : : DRV_LOG(ERR, "DV support is missing for HWS.");
1774 : : goto error;
1775 : : #endif
1776 : : }
1777 [ # # ]: 0 : if (!priv->sh->flow_priority_check_flag) {
1778 : : /* Supported Verbs flow priority number detection. */
1779 : 0 : err = mlx5_flow_discover_priorities(eth_dev);
1780 : 0 : priv->sh->flow_max_priority = err;
1781 : 0 : priv->sh->flow_priority_check_flag = 1;
1782 : : } else {
1783 : 0 : err = priv->sh->flow_max_priority;
1784 : : }
1785 [ # # ]: 0 : if (err < 0) {
1786 : 0 : err = -err;
1787 : 0 : goto error;
1788 : : }
1789 : : rte_spinlock_init(&priv->shared_act_sl);
1790 : 0 : mlx5_flow_counter_mode_config(eth_dev);
1791 : 0 : mlx5_flow_drop_action_config(eth_dev);
1792 [ # # ]: 0 : if (sh->config.dv_flow_en)
1793 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1794 : : return eth_dev;
1795 : 0 : error:
1796 [ # # ]: 0 : if (priv) {
1797 : 0 : priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
1798 : : RTE_MAX_ETHPORTS;
1799 : 0 : rte_io_wmb();
1800 : : #ifdef HAVE_MLX5_HWS_SUPPORT
1801 [ # # ]: 0 : if (eth_dev &&
1802 [ # # ]: 0 : priv->sh &&
1803 [ # # ]: 0 : priv->sh->config.dv_flow_en == 2 &&
1804 : : priv->sh->config.dv_esw_en)
1805 : 0 : flow_hw_destroy_vport_action(eth_dev);
1806 : : #endif
1807 [ # # ]: 0 : if (priv->sh)
1808 : 0 : mlx5_os_free_shared_dr(priv);
1809 [ # # ]: 0 : if (priv->nl_socket_route >= 0)
1810 : 0 : close(priv->nl_socket_route);
1811 [ # # ]: 0 : if (priv->vmwa_context)
1812 : 0 : mlx5_vlan_vmwa_exit(priv->vmwa_context);
1813 [ # # # # ]: 0 : if (eth_dev && priv->drop_queue.hrxq)
1814 : 0 : mlx5_drop_action_destroy(eth_dev);
1815 [ # # ]: 0 : if (priv->mtr_profile_tbl)
1816 : 0 : mlx5_l3t_destroy(priv->mtr_profile_tbl);
1817 [ # # ]: 0 : if (own_domain_id)
1818 : 0 : claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1819 [ # # ]: 0 : if (priv->hrxqs)
1820 : 0 : mlx5_list_destroy(priv->hrxqs);
1821 [ # # # # ]: 0 : if (eth_dev && priv->flex_item_map)
1822 : 0 : mlx5_flex_item_port_cleanup(eth_dev);
1823 : 0 : mlx5_free(priv->ext_rxqs);
1824 : 0 : mlx5_free(priv->ext_txqs);
1825 : 0 : mlx5_free(priv);
1826 [ # # ]: 0 : if (eth_dev != NULL)
1827 : 0 : eth_dev->data->dev_private = NULL;
1828 : : }
1829 [ # # ]: 0 : if (eth_dev != NULL) {
1830 : : /* mac_addrs must not be freed alone because part of
1831 : : * dev_private
1832 : : **/
1833 : 0 : eth_dev->data->mac_addrs = NULL;
1834 : 0 : rte_eth_dev_release_port(eth_dev);
1835 : : }
1836 : : if (sh)
1837 : 0 : mlx5_free_shared_dev_ctx(sh);
1838 [ # # ]: 0 : if (nl_rdma >= 0)
1839 : 0 : close(nl_rdma);
1840 : : MLX5_ASSERT(err > 0);
1841 : 0 : rte_errno = err;
1842 : 0 : return NULL;
1843 : : }
1844 : :
1845 : : /**
1846 : : * Comparison callback to sort device data.
1847 : : *
1848 : : * This is meant to be used with qsort().
1849 : : *
1850 : : * @param a[in]
1851 : : * Pointer to pointer to first data object.
1852 : : * @param b[in]
1853 : : * Pointer to pointer to second data object.
1854 : : *
1855 : : * @return
1856 : : * 0 if both objects are equal, less than 0 if the first argument is less
1857 : : * than the second, greater than 0 otherwise.
1858 : : */
1859 : : static int
1860 : 0 : mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1861 : : {
1862 : : const struct mlx5_switch_info *si_a =
1863 : : &((const struct mlx5_dev_spawn_data *)a)->info;
1864 : : const struct mlx5_switch_info *si_b =
1865 : : &((const struct mlx5_dev_spawn_data *)b)->info;
1866 : 0 : int uplink_a = si_a->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
1867 : 0 : int uplink_b = si_b->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK;
1868 : : int ret;
1869 : :
1870 : : /* Uplink ports first. */
1871 : 0 : ret = uplink_b - uplink_a;
1872 [ # # ]: 0 : if (ret)
1873 : : return ret;
1874 : : /* Then master devices. */
1875 : 0 : ret = si_b->master - si_a->master;
1876 [ # # ]: 0 : if (ret)
1877 : : return ret;
1878 : : /* Then representor devices. */
1879 : 0 : ret = si_b->representor - si_a->representor;
1880 [ # # ]: 0 : if (ret)
1881 : : return ret;
1882 : : /* Unidentified devices come last in no specific order. */
1883 [ # # ]: 0 : if (!si_a->representor)
1884 : : return 0;
1885 : : /* Order representors by name. */
1886 : 0 : return si_a->port_name - si_b->port_name;
1887 : : }
1888 : :
1889 : : /**
1890 : : * Match PCI information for possible slaves of bonding device.
1891 : : *
1892 : : * @param[in] ibdev_name
1893 : : * Name of Infiniband device.
1894 : : * @param[in] pci_dev
1895 : : * Pointer to primary PCI address structure to match.
1896 : : * @param[in] nl_rdma
1897 : : * Netlink RDMA group socket handle.
1898 : : * @param[in] owner
1899 : : * Representor owner PF index.
1900 : : * @param[out] bond_info
1901 : : * Pointer to bonding information.
1902 : : *
1903 : : * @return
1904 : : * negative value if no bonding device found, otherwise
1905 : : * positive index of slave PF in bonding.
1906 : : */
1907 : : static int
1908 : 0 : mlx5_device_bond_pci_match(const char *ibdev_name,
1909 : : const struct rte_pci_addr *pci_dev,
1910 : : int nl_rdma, uint16_t owner,
1911 : : struct mlx5_bond_info *bond_info)
1912 : : {
1913 : : char ifname[IF_NAMESIZE + 1];
1914 : : unsigned int ifindex;
1915 : : unsigned int np, i;
1916 : : FILE *bond_file = NULL, *file;
1917 : : int pf = -1;
1918 : : int ret;
1919 : 0 : uint8_t cur_guid[32] = {0};
1920 [ # # ]: 0 : uint8_t guid[32] = {0};
1921 : :
1922 : : /*
1923 : : * Try to get master device name. If something goes wrong suppose
1924 : : * the lack of kernel support and no bonding devices.
1925 : : */
1926 : : memset(bond_info, 0, sizeof(*bond_info));
1927 [ # # ]: 0 : if (nl_rdma < 0)
1928 : : return -1;
1929 [ # # ]: 0 : if (!strstr(ibdev_name, "bond"))
1930 : : return -1;
1931 : 0 : np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1932 [ # # ]: 0 : if (!np)
1933 : : return -1;
1934 [ # # ]: 0 : if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1935 : : return -1;
1936 : : /*
1937 : : * The master device might not be on the predefined port(not on port
1938 : : * index 1, it is not guaranteed), we have to scan all Infiniband
1939 : : * device ports and find master.
1940 : : */
1941 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
1942 : : /* Check whether Infiniband port is populated. */
1943 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1944 [ # # ]: 0 : if (!ifindex)
1945 : 0 : continue;
1946 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
1947 : 0 : continue;
1948 : : /* Try to read bonding slave names from sysfs. */
1949 : 0 : MKSTR(slaves,
1950 : : "/sys/class/net/%s/master/bonding/slaves", ifname);
1951 : 0 : bond_file = fopen(slaves, "r");
1952 [ # # ]: 0 : if (bond_file)
1953 : : break;
1954 : : }
1955 [ # # ]: 0 : if (!bond_file)
1956 : : return -1;
1957 : : /* Use safe format to check maximal buffer length. */
1958 : : MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1959 [ # # ]: 0 : while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1960 : : char tmp_str[IF_NAMESIZE + 32];
1961 : : struct rte_pci_addr pci_addr;
1962 : : struct mlx5_switch_info info;
1963 : : int ret;
1964 : :
1965 : : /* Process slave interface names in the loop. */
1966 : : snprintf(tmp_str, sizeof(tmp_str),
1967 : : "/sys/class/net/%s", ifname);
1968 [ # # ]: 0 : if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1969 : 0 : DRV_LOG(WARNING,
1970 : : "Cannot get PCI address for netdev \"%s\".",
1971 : : ifname);
1972 : 0 : continue;
1973 : : }
1974 : : /* Slave interface PCI address match found. */
1975 : : snprintf(tmp_str, sizeof(tmp_str),
1976 : : "/sys/class/net/%s/phys_port_name", ifname);
1977 : 0 : file = fopen(tmp_str, "rb");
1978 [ # # ]: 0 : if (!file)
1979 : : break;
1980 : 0 : info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1981 [ # # ]: 0 : if (fscanf(file, "%32s", tmp_str) == 1)
1982 : 0 : mlx5_translate_port_name(tmp_str, &info);
1983 : 0 : fclose(file);
1984 : : /* Only process PF ports. */
1985 [ # # ]: 0 : if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1986 : : info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1987 : 0 : continue;
1988 : : /* Check max bonding member. */
1989 [ # # ]: 0 : if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1990 : 0 : DRV_LOG(WARNING, "bonding index out of range, "
1991 : : "please increase MLX5_BOND_MAX_PORTS: %s",
1992 : : tmp_str);
1993 : 0 : break;
1994 : : }
1995 : : /* Get ifindex. */
1996 : : snprintf(tmp_str, sizeof(tmp_str),
1997 : : "/sys/class/net/%s/ifindex", ifname);
1998 : 0 : file = fopen(tmp_str, "rb");
1999 [ # # ]: 0 : if (!file)
2000 : : break;
2001 : 0 : ret = fscanf(file, "%u", &ifindex);
2002 : 0 : fclose(file);
2003 [ # # ]: 0 : if (ret != 1)
2004 : : break;
2005 : : /* Save bonding info. */
2006 : 0 : strncpy(bond_info->ports[info.port_name].ifname, ifname,
2007 : : sizeof(bond_info->ports[0].ifname));
2008 : 0 : bond_info->ports[info.port_name].pci_addr = pci_addr;
2009 : 0 : bond_info->ports[info.port_name].ifindex = ifindex;
2010 : 0 : bond_info->n_port++;
2011 : : /*
2012 : : * Under socket direct mode, bonding will use
2013 : : * system_image_guid as identification.
2014 : : * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
2015 : : * All bonding members should have the same guid even if driver
2016 : : * is using PCIe BDF.
2017 : : */
2018 : 0 : ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
2019 [ # # ]: 0 : if (ret < 0)
2020 : : break;
2021 [ # # ]: 0 : else if (ret > 0) {
2022 [ # # ]: 0 : if (!memcmp(guid, cur_guid, sizeof(guid)) &&
2023 [ # # # # ]: 0 : owner == info.port_name &&
2024 [ # # ]: 0 : (owner != 0 || (owner == 0 &&
2025 : 0 : !rte_pci_addr_cmp(pci_dev, &pci_addr))))
2026 : 0 : pf = info.port_name;
2027 [ # # ]: 0 : } else if (pci_dev->domain == pci_addr.domain &&
2028 [ # # ]: 0 : pci_dev->bus == pci_addr.bus &&
2029 : 0 : pci_dev->devid == pci_addr.devid &&
2030 [ # # ]: 0 : ((pci_dev->function == 0 &&
2031 [ # # ]: 0 : pci_dev->function + owner == pci_addr.function) ||
2032 [ # # ]: 0 : (pci_dev->function == owner &&
2033 [ # # ]: 0 : pci_addr.function == owner)))
2034 : 0 : pf = info.port_name;
2035 : : }
2036 [ # # ]: 0 : if (pf >= 0) {
2037 : : /* Get bond interface info */
2038 : 0 : ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2039 : 0 : bond_info->ifname);
2040 [ # # ]: 0 : if (ret)
2041 : 0 : DRV_LOG(ERR, "unable to get bond info: %s",
2042 : : strerror(rte_errno));
2043 : : else
2044 : 0 : DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2045 : : ifindex, bond_info->ifindex, bond_info->ifname);
2046 : : }
2047 [ # # ]: 0 : if (owner == 0 && pf != 0) {
2048 : 0 : DRV_LOG(INFO, "PCIe instance " PCI_PRI_FMT " isn't bonding owner",
2049 : : pci_dev->domain, pci_dev->bus, pci_dev->devid,
2050 : : pci_dev->function);
2051 : : }
2052 : : return pf;
2053 : : }
2054 : :
2055 : : static int
2056 : 0 : mlx5_nl_esw_multiport_get(struct rte_pci_addr *pci_addr, int *enabled)
2057 : : {
2058 : 0 : char pci_addr_str[PCI_PRI_STR_SIZE] = { 0 };
2059 : : int nlsk_fd;
2060 : : int devlink_id;
2061 : : int ret;
2062 : :
2063 : : /* Provide correct value to have defined enabled state in case of an error. */
2064 : 0 : *enabled = 0;
2065 : 0 : rte_pci_device_name(pci_addr, pci_addr_str, sizeof(pci_addr_str));
2066 : 0 : nlsk_fd = mlx5_nl_init(NETLINK_GENERIC, 0);
2067 [ # # ]: 0 : if (nlsk_fd < 0)
2068 : : return nlsk_fd;
2069 : 0 : devlink_id = mlx5_nl_devlink_family_id_get(nlsk_fd);
2070 [ # # ]: 0 : if (devlink_id < 0) {
2071 : : ret = devlink_id;
2072 : 0 : DRV_LOG(DEBUG, "Unable to get devlink family id for Multiport E-Switch checks "
2073 : : "by netlink, for PCI device %s", pci_addr_str);
2074 : 0 : goto close_nlsk_fd;
2075 : : }
2076 : 0 : ret = mlx5_nl_devlink_esw_multiport_get(nlsk_fd, devlink_id, pci_addr_str, enabled);
2077 [ # # ]: 0 : if (ret < 0)
2078 : 0 : DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by Netlink.");
2079 : 0 : close_nlsk_fd:
2080 : 0 : close(nlsk_fd);
2081 : 0 : return ret;
2082 : : }
2083 : :
2084 : : #define SYSFS_MPESW_PARAM_MAX_LEN 16
2085 : :
2086 : : static int
2087 : 0 : mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled)
2088 : : {
2089 : : int nl_rdma;
2090 : : unsigned int n_ports;
2091 : : unsigned int i;
2092 : : int ret;
2093 : :
2094 : : /* Provide correct value to have defined enabled state in case of an error. */
2095 : 0 : *enabled = 0;
2096 : 0 : nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2097 [ # # ]: 0 : if (nl_rdma < 0)
2098 : : return nl_rdma;
2099 : 0 : n_ports = mlx5_nl_portnum(nl_rdma, ibv->name);
2100 [ # # ]: 0 : if (!n_ports) {
2101 : 0 : ret = -rte_errno;
2102 : 0 : goto close_nl_rdma;
2103 : : }
2104 [ # # ]: 0 : for (i = 1; i <= n_ports; ++i) {
2105 : : unsigned int ifindex;
2106 : : char ifname[IF_NAMESIZE + 1];
2107 : : struct rte_pci_addr if_pci_addr;
2108 : : char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1];
2109 : : FILE *sysfs;
2110 : : int n;
2111 : :
2112 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i);
2113 [ # # ]: 0 : if (!ifindex)
2114 : 0 : continue;
2115 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2116 : 0 : continue;
2117 : 0 : MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname);
2118 [ # # ]: 0 : if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr))
2119 : 0 : continue;
2120 [ # # ]: 0 : if (pci_addr->domain != if_pci_addr.domain ||
2121 [ # # ]: 0 : pci_addr->bus != if_pci_addr.bus ||
2122 : 0 : pci_addr->devid != if_pci_addr.devid ||
2123 [ # # ]: 0 : pci_addr->function != if_pci_addr.function)
2124 : 0 : continue;
2125 : 0 : MKSTR(sysfs_mpesw_path,
2126 : : "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname);
2127 : 0 : sysfs = fopen(sysfs_mpesw_path, "r");
2128 [ # # ]: 0 : if (!sysfs)
2129 : 0 : continue;
2130 : 0 : n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw);
2131 : 0 : fclose(sysfs);
2132 [ # # ]: 0 : if (n != 1)
2133 : 0 : continue;
2134 : : ret = 0;
2135 [ # # ]: 0 : if (strcmp(mpesw, "multiport_esw") == 0) {
2136 : 0 : *enabled = 1;
2137 : 0 : break;
2138 : : }
2139 : 0 : *enabled = 0;
2140 : 0 : break;
2141 : : }
2142 [ # # ]: 0 : if (i > n_ports) {
2143 : 0 : DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs.");
2144 : 0 : rte_errno = ENOENT;
2145 : : ret = -rte_errno;
2146 : : }
2147 : :
2148 : 0 : close_nl_rdma:
2149 : 0 : close(nl_rdma);
2150 : 0 : return ret;
2151 : : }
2152 : :
2153 : : static int
2154 : 0 : mlx5_is_mpesw_enabled(struct ibv_device *ibv, struct rte_pci_addr *ibv_pci_addr, int *enabled)
2155 : : {
2156 : : /*
2157 : : * Try getting Multiport E-Switch state through netlink interface
2158 : : * If unable, try sysfs interface. If that is unable as well,
2159 : : * assume that Multiport E-Switch is disabled and return an error.
2160 : : */
2161 [ # # # # ]: 0 : if (mlx5_nl_esw_multiport_get(ibv_pci_addr, enabled) >= 0 ||
2162 : 0 : mlx5_sysfs_esw_multiport_get(ibv, ibv_pci_addr, enabled) >= 0)
2163 : 0 : return 0;
2164 : 0 : DRV_LOG(DEBUG, "Unable to check MPESW state for IB device %s "
2165 : : "(PCI: " PCI_PRI_FMT ")",
2166 : : ibv->name,
2167 : : ibv_pci_addr->domain, ibv_pci_addr->bus,
2168 : : ibv_pci_addr->devid, ibv_pci_addr->function);
2169 : 0 : *enabled = 0;
2170 : 0 : return -rte_errno;
2171 : : }
2172 : :
2173 : : static int
2174 : 0 : mlx5_device_mpesw_pci_match(struct ibv_device *ibv,
2175 : : const struct rte_pci_addr *owner_pci,
2176 : : int nl_rdma)
2177 : : {
2178 : 0 : struct rte_pci_addr ibdev_pci_addr = { 0 };
2179 : 0 : char ifname[IF_NAMESIZE + 1] = { 0 };
2180 : : unsigned int ifindex;
2181 : : unsigned int np;
2182 : : unsigned int i;
2183 : 0 : int enabled = 0;
2184 : : int ret;
2185 : :
2186 : : /* Check if IB device's PCI address matches the probed PCI address. */
2187 [ # # ]: 0 : if (mlx5_get_pci_addr(ibv->ibdev_path, &ibdev_pci_addr)) {
2188 : 0 : DRV_LOG(DEBUG, "Skipping MPESW check for IB device %s since "
2189 : : "there is no underlying PCI device", ibv->name);
2190 : 0 : rte_errno = ENOENT;
2191 : 0 : return -rte_errno;
2192 : : }
2193 [ # # ]: 0 : if (ibdev_pci_addr.domain != owner_pci->domain ||
2194 [ # # ]: 0 : ibdev_pci_addr.bus != owner_pci->bus ||
2195 : 0 : ibdev_pci_addr.devid != owner_pci->devid ||
2196 [ # # ]: 0 : ibdev_pci_addr.function != owner_pci->function) {
2197 : : return -1;
2198 : : }
2199 : : /* Check if IB device has MPESW enabled. */
2200 [ # # ]: 0 : if (mlx5_is_mpesw_enabled(ibv, &ibdev_pci_addr, &enabled))
2201 : : return -1;
2202 [ # # ]: 0 : if (!enabled)
2203 : : return -1;
2204 : : /* Iterate through IB ports to find MPESW master uplink port. */
2205 [ # # ]: 0 : if (nl_rdma < 0)
2206 : : return -1;
2207 : 0 : np = mlx5_nl_portnum(nl_rdma, ibv->name);
2208 [ # # ]: 0 : if (!np)
2209 : : return -1;
2210 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2211 : : struct rte_pci_addr pci_addr;
2212 : : FILE *file;
2213 : : char port_name[IF_NAMESIZE + 1];
2214 : : struct mlx5_switch_info info;
2215 : :
2216 : : /* Check whether IB port has a corresponding netdev. */
2217 : 0 : ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i);
2218 [ # # ]: 0 : if (!ifindex)
2219 : 0 : continue;
2220 [ # # ]: 0 : if (!if_indextoname(ifindex, ifname))
2221 : 0 : continue;
2222 : : /* Read port name and determine its type. */
2223 : 0 : MKSTR(ifphysportname, "/sys/class/net/%s/phys_port_name", ifname);
2224 : 0 : file = fopen(ifphysportname, "rb");
2225 [ # # ]: 0 : if (!file)
2226 : 0 : continue;
2227 : 0 : ret = fscanf(file, "%16s", port_name);
2228 : 0 : fclose(file);
2229 [ # # ]: 0 : if (ret != 1)
2230 : 0 : continue;
2231 : : memset(&info, 0, sizeof(info));
2232 : 0 : mlx5_translate_port_name(port_name, &info);
2233 [ # # ]: 0 : if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2234 : 0 : continue;
2235 : : /* Fetch PCI address of the device to which the netdev is bound. */
2236 : 0 : MKSTR(ifpath, "/sys/class/net/%s", ifname);
2237 [ # # ]: 0 : if (mlx5_get_pci_addr(ifpath, &pci_addr))
2238 : 0 : continue;
2239 [ # # ]: 0 : if (pci_addr.domain == ibdev_pci_addr.domain &&
2240 : : pci_addr.bus == ibdev_pci_addr.bus &&
2241 [ # # ]: 0 : pci_addr.devid == ibdev_pci_addr.devid &&
2242 : : pci_addr.function == ibdev_pci_addr.function) {
2243 : : MLX5_ASSERT(info.port_name >= 0);
2244 : 0 : return info.port_name;
2245 : : }
2246 : : }
2247 : : /* No matching MPESW uplink port was found. */
2248 : : return -1;
2249 : : }
2250 : :
2251 : : /**
2252 : : * Register a PCI device within bonding.
2253 : : *
2254 : : * This function spawns Ethernet devices out of a given PCI device and
2255 : : * bonding owner PF index.
2256 : : *
2257 : : * @param[in] cdev
2258 : : * Pointer to common mlx5 device structure.
2259 : : * @param[in] req_eth_da
2260 : : * Requested ethdev device argument.
2261 : : * @param[in] owner_id
2262 : : * Requested owner PF port ID within bonding device, default to 0.
2263 : : * @param[in, out] mkvlist
2264 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2265 : : *
2266 : : * @return
2267 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2268 : : */
2269 : : static int
2270 : 0 : mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2271 : : struct rte_eth_devargs *req_eth_da,
2272 : : uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)
2273 : 0 : {
2274 : : struct ibv_device **ibv_list;
2275 : : /*
2276 : : * Number of found IB Devices matching with requested PCI BDF.
2277 : : * nd != 1 means there are multiple IB devices over the same
2278 : : * PCI device and we have representors and master.
2279 : : */
2280 : : unsigned int nd = 0;
2281 : : /*
2282 : : * Number of found IB device Ports. nd = 1 and np = 1..n means
2283 : : * we have the single multiport IB device, and there may be
2284 : : * representors attached to some of found ports.
2285 : : */
2286 : : unsigned int np = 0;
2287 : : /*
2288 : : * Number of DPDK ethernet devices to Spawn - either over
2289 : : * multiple IB devices or multiple ports of single IB device.
2290 : : * Actually this is the number of iterations to spawn.
2291 : : */
2292 : : unsigned int ns = 0;
2293 : : /*
2294 : : * Bonding device
2295 : : * < 0 - no bonding device (single one)
2296 : : * >= 0 - bonding device (value is slave PF index)
2297 : : */
2298 : : int bd = -1;
2299 : : /*
2300 : : * Multiport E-Switch (MPESW) device:
2301 : : * < 0 - no MPESW device or could not determine if it is MPESW device,
2302 : : * >= 0 - MPESW device. Value is the port index of the MPESW owner.
2303 : : */
2304 : : int mpesw = MLX5_MPESW_PORT_INVALID;
2305 : 0 : struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2306 : : struct mlx5_dev_spawn_data *list = NULL;
2307 : 0 : struct rte_eth_devargs eth_da = *req_eth_da;
2308 : 0 : struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2309 : : struct mlx5_bond_info bond_info;
2310 : 0 : int ret = -1;
2311 : :
2312 : 0 : errno = 0;
2313 : 0 : ibv_list = mlx5_glue->get_device_list(&ret);
2314 [ # # ]: 0 : if (!ibv_list) {
2315 [ # # ]: 0 : rte_errno = errno ? errno : ENOSYS;
2316 : 0 : DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2317 : 0 : return -rte_errno;
2318 : : }
2319 : : /*
2320 : : * First scan the list of all Infiniband devices to find
2321 : : * matching ones, gathering into the list.
2322 : : */
2323 : 0 : struct ibv_device *ibv_match[ret + 1];
2324 : 0 : int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0);
2325 : 0 : int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2326 : : unsigned int i;
2327 : :
2328 [ # # ]: 0 : while (ret-- > 0) {
2329 : : struct rte_pci_addr pci_addr;
2330 : :
2331 : 0 : DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2332 : 0 : bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2333 : : nl_rdma, owner_id, &bond_info);
2334 [ # # ]: 0 : if (bd >= 0) {
2335 : : /*
2336 : : * Bonding device detected. Only one match is allowed,
2337 : : * the bonding is supported over multi-port IB device,
2338 : : * there should be no matches on representor PCI
2339 : : * functions or non VF LAG bonding devices with
2340 : : * specified address.
2341 : : */
2342 [ # # ]: 0 : if (nd) {
2343 : 0 : DRV_LOG(ERR,
2344 : : "multiple PCI match on bonding device"
2345 : : "\"%s\" found", ibv_list[ret]->name);
2346 : 0 : rte_errno = ENOENT;
2347 : 0 : ret = -rte_errno;
2348 : 0 : goto exit;
2349 : : }
2350 : : /* Amend owner pci address if owner PF ID specified. */
2351 [ # # ]: 0 : if (eth_da.nb_representor_ports)
2352 : 0 : owner_pci.function += owner_id;
2353 : 0 : DRV_LOG(INFO,
2354 : : "PCI information matches for slave %d bonding device \"%s\"",
2355 : : bd, ibv_list[ret]->name);
2356 : 0 : ibv_match[nd++] = ibv_list[ret];
2357 : 0 : break;
2358 : : }
2359 : 0 : mpesw = mlx5_device_mpesw_pci_match(ibv_list[ret], &owner_pci, nl_rdma);
2360 [ # # ]: 0 : if (mpesw >= 0) {
2361 : : /*
2362 : : * MPESW device detected. Only one matching IB device is allowed,
2363 : : * so if any matches were found previously, fail gracefully.
2364 : : */
2365 [ # # ]: 0 : if (nd) {
2366 : 0 : DRV_LOG(ERR,
2367 : : "PCI information matches MPESW device \"%s\", "
2368 : : "but multiple matching PCI devices were found. "
2369 : : "Probing failed.",
2370 : : ibv_list[ret]->name);
2371 : 0 : rte_errno = ENOENT;
2372 : 0 : ret = -rte_errno;
2373 : 0 : goto exit;
2374 : : }
2375 : 0 : DRV_LOG(INFO,
2376 : : "PCI information matches MPESW device \"%s\"",
2377 : : ibv_list[ret]->name);
2378 : 0 : ibv_match[nd++] = ibv_list[ret];
2379 : 0 : break;
2380 : : }
2381 : : /* Bonding or MPESW device was not found. */
2382 [ # # ]: 0 : if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2383 : : &pci_addr))
2384 : 0 : continue;
2385 [ # # ]: 0 : if (rte_pci_addr_cmp(&owner_pci, &pci_addr) != 0)
2386 : 0 : continue;
2387 : 0 : DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2388 : : ibv_list[ret]->name);
2389 : 0 : ibv_match[nd++] = ibv_list[ret];
2390 : : }
2391 : 0 : ibv_match[nd] = NULL;
2392 [ # # ]: 0 : if (!nd) {
2393 : : /* No device matches, just complain and bail out. */
2394 : 0 : DRV_LOG(WARNING,
2395 : : "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT ","
2396 : : " are kernel drivers loaded?",
2397 : : owner_id, owner_pci.domain, owner_pci.bus,
2398 : : owner_pci.devid, owner_pci.function);
2399 : 0 : rte_errno = ENOENT;
2400 : 0 : ret = -rte_errno;
2401 : 0 : goto exit;
2402 : : }
2403 [ # # ]: 0 : if (nd == 1) {
2404 : : /*
2405 : : * Found single matching device may have multiple ports.
2406 : : * Each port may be representor, we have to check the port
2407 : : * number and check the representors existence.
2408 : : */
2409 [ # # ]: 0 : if (nl_rdma >= 0)
2410 : 0 : np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2411 [ # # ]: 0 : if (!np)
2412 : 0 : DRV_LOG(WARNING,
2413 : : "Cannot get IB device \"%s\" ports number.",
2414 : : ibv_match[0]->name);
2415 [ # # ]: 0 : if (bd >= 0 && !np) {
2416 : 0 : DRV_LOG(ERR, "Cannot get ports for bonding device.");
2417 : 0 : rte_errno = ENOENT;
2418 : 0 : ret = -rte_errno;
2419 : 0 : goto exit;
2420 : : }
2421 [ # # ]: 0 : if (mpesw >= 0 && !np) {
2422 : 0 : DRV_LOG(ERR, "Cannot get ports for MPESW device.");
2423 : 0 : rte_errno = ENOENT;
2424 : 0 : ret = -rte_errno;
2425 : 0 : goto exit;
2426 : : }
2427 : : }
2428 : : /* Now we can determine the maximal amount of devices to be spawned. */
2429 [ # # ]: 0 : list = mlx5_malloc(MLX5_MEM_ZERO,
2430 : 0 : sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2431 : : RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2432 [ # # ]: 0 : if (!list) {
2433 : 0 : DRV_LOG(ERR, "Spawn data array allocation failure.");
2434 : 0 : rte_errno = ENOMEM;
2435 : 0 : ret = -rte_errno;
2436 : 0 : goto exit;
2437 : : }
2438 [ # # # # ]: 0 : if (bd >= 0 || mpesw >= 0 || np > 1) {
2439 : : /*
2440 : : * Single IB device with multiple ports found,
2441 : : * it may be E-Switch master device and representors.
2442 : : * We have to perform identification through the ports.
2443 : : */
2444 : : MLX5_ASSERT(nl_rdma >= 0);
2445 : : MLX5_ASSERT(ns == 0);
2446 : : MLX5_ASSERT(nd == 1);
2447 : : MLX5_ASSERT(np);
2448 [ # # ]: 0 : for (i = 1; i <= np; ++i) {
2449 : 0 : list[ns].bond_info = &bond_info;
2450 : 0 : list[ns].max_port = np;
2451 : 0 : list[ns].phys_port = i;
2452 : 0 : list[ns].phys_dev_name = ibv_match[0]->name;
2453 : 0 : list[ns].eth_dev = NULL;
2454 : 0 : list[ns].pci_dev = pci_dev;
2455 : 0 : list[ns].cdev = cdev;
2456 : 0 : list[ns].pf_bond = bd;
2457 : 0 : list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2458 : 0 : list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2459 : : ibv_match[0]->name,
2460 : : i);
2461 [ # # ]: 0 : if (!list[ns].ifindex) {
2462 : : /*
2463 : : * No network interface index found for the
2464 : : * specified port, it means there is no
2465 : : * representor on this port. It's OK,
2466 : : * there can be disabled ports, for example
2467 : : * if sriov_numvfs < sriov_totalvfs.
2468 : : */
2469 : 0 : continue;
2470 : : }
2471 : 0 : ret = -1;
2472 [ # # ]: 0 : if (nl_route >= 0)
2473 : 0 : ret = mlx5_nl_switch_info(nl_route,
2474 : : list[ns].ifindex,
2475 : : &list[ns].info);
2476 [ # # # # ]: 0 : if (ret || (!list[ns].info.representor &&
2477 : : !list[ns].info.master)) {
2478 : : /*
2479 : : * We failed to recognize representors with
2480 : : * Netlink, let's try to perform the task
2481 : : * with sysfs.
2482 : : */
2483 : 0 : ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2484 : : &list[ns].info);
2485 : : }
2486 [ # # # # ]: 0 : if (!ret && bd >= 0) {
2487 [ # # # ]: 0 : switch (list[ns].info.name_type) {
2488 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2489 [ # # ]: 0 : if (np == 1) {
2490 : : /*
2491 : : * Force standalone bonding
2492 : : * device for ROCE LAG
2493 : : * configurations.
2494 : : */
2495 : 0 : list[ns].info.master = 0;
2496 : 0 : list[ns].info.representor = 0;
2497 : : }
2498 : 0 : ns++;
2499 : 0 : break;
2500 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2501 : : /* Fallthrough */
2502 : : case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2503 : : /* Fallthrough */
2504 : : case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2505 [ # # ]: 0 : if (list[ns].info.pf_num == bd)
2506 : 0 : ns++;
2507 : : break;
2508 : : default:
2509 : : break;
2510 : : }
2511 : 0 : continue;
2512 : : }
2513 [ # # # # ]: 0 : if (!ret && mpesw >= 0) {
2514 [ # # # ]: 0 : switch (list[ns].info.name_type) {
2515 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2516 : : /* Owner port is treated as master port. */
2517 [ # # ]: 0 : if (list[ns].info.port_name == mpesw) {
2518 : 0 : list[ns].info.master = 1;
2519 : 0 : list[ns].info.representor = 0;
2520 : : } else {
2521 : 0 : list[ns].info.master = 0;
2522 : 0 : list[ns].info.representor = 1;
2523 : : }
2524 : : /*
2525 : : * Ports of this type have uplink port index
2526 : : * encoded in the name. This index is also a PF index.
2527 : : */
2528 : 0 : list[ns].info.pf_num = list[ns].info.port_name;
2529 : 0 : list[ns].mpesw_port = list[ns].info.port_name;
2530 : 0 : list[ns].info.mpesw_owner = mpesw;
2531 : 0 : ns++;
2532 : 0 : break;
2533 : 0 : case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2534 : : case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2535 : : case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2536 : : /* Only spawn representors related to the probed PF. */
2537 [ # # ]: 0 : if (list[ns].info.pf_num == owner_id) {
2538 : : /*
2539 : : * Ports of this type have PF index encoded in name,
2540 : : * which translate to the related uplink port index.
2541 : : */
2542 : 0 : list[ns].mpesw_port = list[ns].info.pf_num;
2543 : : /* MPESW owner is also saved but not used now. */
2544 : 0 : list[ns].info.mpesw_owner = mpesw;
2545 : 0 : ns++;
2546 : : }
2547 : : break;
2548 : : default:
2549 : : break;
2550 : : }
2551 : 0 : continue;
2552 : : }
2553 [ # # ]: 0 : if (!ret && (list[ns].info.representor ^
2554 [ # # ]: 0 : list[ns].info.master))
2555 : 0 : ns++;
2556 : : }
2557 : : } else {
2558 : : /*
2559 : : * The existence of several matching entries (nd > 1) means
2560 : : * port representors have been instantiated. No existing Verbs
2561 : : * call nor sysfs entries can tell them apart, this can only
2562 : : * be done through Netlink calls assuming kernel drivers are
2563 : : * recent enough to support them.
2564 : : *
2565 : : * In the event of identification failure through Netlink,
2566 : : * try again through sysfs, then:
2567 : : *
2568 : : * 1. A single IB device matches (nd == 1) with single
2569 : : * port (np=0/1) and is not a representor, assume
2570 : : * no switch support.
2571 : : *
2572 : : * 2. Otherwise no safe assumptions can be made;
2573 : : * complain louder and bail out.
2574 : : */
2575 [ # # ]: 0 : for (i = 0; i != nd; ++i) {
2576 [ # # ]: 0 : memset(&list[ns].info, 0, sizeof(list[ns].info));
2577 : 0 : list[ns].bond_info = NULL;
2578 : 0 : list[ns].max_port = 1;
2579 : 0 : list[ns].phys_port = 1;
2580 : 0 : list[ns].phys_dev_name = ibv_match[i]->name;
2581 : 0 : list[ns].eth_dev = NULL;
2582 : 0 : list[ns].pci_dev = pci_dev;
2583 : 0 : list[ns].cdev = cdev;
2584 : 0 : list[ns].pf_bond = -1;
2585 : 0 : list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2586 : 0 : list[ns].ifindex = 0;
2587 [ # # ]: 0 : if (nl_rdma >= 0)
2588 : 0 : list[ns].ifindex = mlx5_nl_ifindex
2589 : : (nl_rdma,
2590 : : ibv_match[i]->name,
2591 : : 1);
2592 [ # # ]: 0 : if (!list[ns].ifindex) {
2593 : : char ifname[IF_NAMESIZE];
2594 : :
2595 : : /*
2596 : : * Netlink failed, it may happen with old
2597 : : * ib_core kernel driver (before 4.16).
2598 : : * We can assume there is old driver because
2599 : : * here we are processing single ports IB
2600 : : * devices. Let's try sysfs to retrieve
2601 : : * the ifindex. The method works for
2602 : : * master device only.
2603 : : */
2604 [ # # ]: 0 : if (nd > 1) {
2605 : : /*
2606 : : * Multiple devices found, assume
2607 : : * representors, can not distinguish
2608 : : * master/representor and retrieve
2609 : : * ifindex via sysfs.
2610 : : */
2611 : 0 : continue;
2612 : : }
2613 : 0 : ret = mlx5_get_ifname_sysfs
2614 : 0 : (ibv_match[i]->ibdev_path, ifname);
2615 [ # # ]: 0 : if (!ret)
2616 : 0 : list[ns].ifindex =
2617 : 0 : if_nametoindex(ifname);
2618 [ # # ]: 0 : if (!list[ns].ifindex) {
2619 : : /*
2620 : : * No network interface index found
2621 : : * for the specified device, it means
2622 : : * there it is neither representor
2623 : : * nor master.
2624 : : */
2625 : 0 : continue;
2626 : : }
2627 : : }
2628 : 0 : ret = -1;
2629 [ # # ]: 0 : if (nl_route >= 0)
2630 : 0 : ret = mlx5_nl_switch_info(nl_route,
2631 : : list[ns].ifindex,
2632 : : &list[ns].info);
2633 [ # # # # ]: 0 : if (ret || (!list[ns].info.representor &&
2634 : : !list[ns].info.master)) {
2635 : : /*
2636 : : * We failed to recognize representors with
2637 : : * Netlink, let's try to perform the task
2638 : : * with sysfs.
2639 : : */
2640 : 0 : ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2641 : : &list[ns].info);
2642 : : }
2643 [ # # ]: 0 : if (!ret && (list[ns].info.representor ^
2644 [ # # ]: 0 : list[ns].info.master)) {
2645 : 0 : ns++;
2646 [ # # ]: 0 : } else if ((nd == 1) &&
2647 [ # # ]: 0 : !list[ns].info.representor &&
2648 : : !list[ns].info.master) {
2649 : : /*
2650 : : * Single IB device with one physical port and
2651 : : * attached network device.
2652 : : * May be SRIOV is not enabled or there is no
2653 : : * representors.
2654 : : */
2655 : 0 : DRV_LOG(INFO, "No E-Switch support detected.");
2656 : 0 : ns++;
2657 : 0 : break;
2658 : : }
2659 : : }
2660 [ # # ]: 0 : if (!ns) {
2661 : 0 : DRV_LOG(ERR,
2662 : : "Unable to recognize master/representors on the multiple IB devices.");
2663 : 0 : rte_errno = ENOENT;
2664 : 0 : ret = -rte_errno;
2665 : 0 : goto exit;
2666 : : }
2667 : : /*
2668 : : * New kernels may add the switch_id attribute for the case
2669 : : * there is no E-Switch and we wrongly recognized the only
2670 : : * device as master. Override this if there is the single
2671 : : * device with single port and new device name format present.
2672 : : */
2673 [ # # ]: 0 : if (nd == 1 &&
2674 [ # # ]: 0 : list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2675 : 0 : list[0].info.master = 0;
2676 : 0 : list[0].info.representor = 0;
2677 : : }
2678 : : }
2679 : : MLX5_ASSERT(ns);
2680 : : /*
2681 : : * Sort list to probe devices in natural order for users convenience
2682 : : * (i.e. master first, then representors from lowest to highest ID).
2683 : : */
2684 : 0 : qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2685 [ # # ]: 0 : if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2686 : : /* Set devargs default values. */
2687 [ # # ]: 0 : if (eth_da.nb_mh_controllers == 0) {
2688 : 0 : eth_da.nb_mh_controllers = 1;
2689 : 0 : eth_da.mh_controllers[0] = 0;
2690 : : }
2691 [ # # # # ]: 0 : if (eth_da.nb_ports == 0 && ns > 0) {
2692 [ # # # # ]: 0 : if (list[0].pf_bond >= 0 && list[0].info.representor)
2693 : 0 : DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2694 : : pci_dev->device.devargs->args);
2695 : 0 : eth_da.nb_ports = 1;
2696 : 0 : eth_da.ports[0] = list[0].info.pf_num;
2697 : : }
2698 [ # # ]: 0 : if (eth_da.nb_representor_ports == 0) {
2699 : 0 : eth_da.nb_representor_ports = 1;
2700 : 0 : eth_da.representor_ports[0] = 0;
2701 : : }
2702 : : }
2703 [ # # ]: 0 : for (i = 0; i != ns; ++i) {
2704 : : uint32_t restore;
2705 : :
2706 : 0 : list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da,
2707 : : mkvlist);
2708 [ # # ]: 0 : if (!list[i].eth_dev) {
2709 [ # # ]: 0 : if (rte_errno != EBUSY && rte_errno != EEXIST)
2710 : : break;
2711 : : /* Device is disabled or already spawned. Ignore it. */
2712 : 0 : continue;
2713 : : }
2714 : 0 : restore = list[i].eth_dev->data->dev_flags;
2715 : 0 : rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2716 : : /**
2717 : : * Each representor has a dedicated interrupts vector.
2718 : : * rte_eth_copy_pci_info() assigns PF interrupts handle to
2719 : : * representor eth_dev object because representor and PF
2720 : : * share the same PCI address.
2721 : : * Override representor device with a dedicated
2722 : : * interrupts handle here.
2723 : : * Representor interrupts handle is released in mlx5_dev_stop().
2724 : : */
2725 [ # # ]: 0 : if (list[i].info.representor) {
2726 : : struct rte_intr_handle *intr_handle =
2727 : 0 : rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2728 [ # # ]: 0 : if (intr_handle == NULL) {
2729 : 0 : DRV_LOG(ERR,
2730 : : "port %u failed to allocate memory for interrupt handler "
2731 : : "Rx interrupts will not be supported",
2732 : : i);
2733 : 0 : rte_errno = ENOMEM;
2734 : 0 : ret = -rte_errno;
2735 : 0 : goto exit;
2736 : : }
2737 : 0 : list[i].eth_dev->intr_handle = intr_handle;
2738 : : }
2739 : : /* Restore non-PCI flags cleared by the above call. */
2740 : 0 : list[i].eth_dev->data->dev_flags |= restore;
2741 : 0 : rte_eth_dev_probing_finish(list[i].eth_dev);
2742 : : }
2743 [ # # ]: 0 : if (i != ns) {
2744 : 0 : DRV_LOG(ERR,
2745 : : "probe of PCI device " PCI_PRI_FMT " aborted after"
2746 : : " encountering an error: %s",
2747 : : owner_pci.domain, owner_pci.bus,
2748 : : owner_pci.devid, owner_pci.function,
2749 : : strerror(rte_errno));
2750 : 0 : ret = -rte_errno;
2751 : : /* Roll back. */
2752 [ # # ]: 0 : while (i--) {
2753 [ # # ]: 0 : if (!list[i].eth_dev)
2754 : 0 : continue;
2755 : 0 : mlx5_dev_close(list[i].eth_dev);
2756 : : /* mac_addrs must not be freed because in dev_private */
2757 : 0 : list[i].eth_dev->data->mac_addrs = NULL;
2758 : 0 : claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2759 : : }
2760 : : /* Restore original error. */
2761 : 0 : rte_errno = -ret;
2762 : : } else {
2763 : 0 : ret = 0;
2764 : : }
2765 : 0 : exit:
2766 : : /*
2767 : : * Do the routine cleanup:
2768 : : * - close opened Netlink sockets
2769 : : * - free allocated spawn data array
2770 : : * - free the Infiniband device list
2771 : : */
2772 [ # # ]: 0 : if (nl_rdma >= 0)
2773 : 0 : close(nl_rdma);
2774 [ # # ]: 0 : if (nl_route >= 0)
2775 : 0 : close(nl_route);
2776 [ # # ]: 0 : if (list)
2777 : 0 : mlx5_free(list);
2778 : : MLX5_ASSERT(ibv_list);
2779 : 0 : mlx5_glue->free_device_list(ibv_list);
2780 : 0 : return ret;
2781 : : }
2782 : :
2783 : : static int
2784 : 0 : mlx5_os_parse_eth_devargs(struct rte_device *dev,
2785 : : struct rte_eth_devargs *eth_da)
2786 : : {
2787 : : int ret = 0;
2788 : :
2789 [ # # ]: 0 : if (dev->devargs == NULL)
2790 : : return 0;
2791 : : memset(eth_da, 0, sizeof(*eth_da));
2792 : : /* Parse representor information first from class argument. */
2793 [ # # ]: 0 : if (dev->devargs->cls_str)
2794 : 0 : ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da, 1);
2795 [ # # ]: 0 : if (ret < 0) {
2796 : 0 : DRV_LOG(ERR, "failed to parse device arguments: %s",
2797 : : dev->devargs->cls_str);
2798 : 0 : return -rte_errno;
2799 : : }
2800 [ # # # # ]: 0 : if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) {
2801 : : /* Parse legacy device argument */
2802 : 0 : ret = rte_eth_devargs_parse(dev->devargs->args, eth_da, 1);
2803 [ # # ]: 0 : if (ret < 0) {
2804 : 0 : DRV_LOG(ERR, "failed to parse device arguments: %s",
2805 : : dev->devargs->args);
2806 : 0 : return -rte_errno;
2807 : : }
2808 : : }
2809 : : return 0;
2810 : : }
2811 : :
2812 : : /**
2813 : : * Callback to register a PCI device.
2814 : : *
2815 : : * This function spawns Ethernet devices out of a given PCI device.
2816 : : *
2817 : : * @param[in] cdev
2818 : : * Pointer to common mlx5 device structure.
2819 : : * @param[in, out] mkvlist
2820 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2821 : : *
2822 : : * @return
2823 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2824 : : */
2825 : : static int
2826 : 0 : mlx5_os_pci_probe(struct mlx5_common_device *cdev,
2827 : : struct mlx5_kvargs_ctrl *mkvlist)
2828 : : {
2829 : 0 : struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2830 : 0 : struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2831 : : int ret = 0;
2832 : : uint16_t p;
2833 : :
2834 : 0 : ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da);
2835 [ # # ]: 0 : if (ret != 0)
2836 : : return ret;
2837 : :
2838 [ # # ]: 0 : if (eth_da.nb_ports > 0) {
2839 : : /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2840 [ # # ]: 0 : for (p = 0; p < eth_da.nb_ports; p++) {
2841 : 0 : ret = mlx5_os_pci_probe_pf(cdev, ð_da,
2842 : 0 : eth_da.ports[p], mkvlist);
2843 [ # # ]: 0 : if (ret) {
2844 : 0 : DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " "
2845 : : "aborted due to proding failure of PF %u",
2846 : : pci_dev->addr.domain, pci_dev->addr.bus,
2847 : : pci_dev->addr.devid, pci_dev->addr.function,
2848 : : eth_da.ports[p]);
2849 : 0 : mlx5_net_remove(cdev);
2850 [ # # ]: 0 : if (p != 0)
2851 : : break;
2852 : : }
2853 : : }
2854 : : } else {
2855 : 0 : ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist);
2856 : : }
2857 : : return ret;
2858 : : }
2859 : :
2860 : : /* Probe a single SF device on auxiliary bus, no representor support. */
2861 : : static int
2862 : 0 : mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,
2863 : : struct mlx5_kvargs_ctrl *mkvlist)
2864 : : {
2865 : 0 : struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2866 : 0 : struct mlx5_dev_spawn_data spawn = {
2867 : : .pf_bond = -1,
2868 : : .mpesw_port = MLX5_MPESW_PORT_INVALID,
2869 : : };
2870 : 0 : struct rte_device *dev = cdev->dev;
2871 : 0 : struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2872 : : struct rte_eth_dev *eth_dev;
2873 : : int ret = 0;
2874 : :
2875 : : /* Parse ethdev devargs. */
2876 : 0 : ret = mlx5_os_parse_eth_devargs(dev, ð_da);
2877 [ # # ]: 0 : if (ret != 0)
2878 : : return ret;
2879 : : /* Init spawn data. */
2880 : 0 : spawn.max_port = 1;
2881 : 0 : spawn.phys_port = 1;
2882 [ # # ]: 0 : spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2883 : 0 : ret = mlx5_auxiliary_get_ifindex(dev->name);
2884 [ # # ]: 0 : if (ret < 0) {
2885 : 0 : DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2886 : 0 : return ret;
2887 : : }
2888 : 0 : spawn.ifindex = ret;
2889 : 0 : spawn.cdev = cdev;
2890 : : /* Spawn device. */
2891 : 0 : eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist);
2892 [ # # ]: 0 : if (eth_dev == NULL)
2893 : 0 : return -rte_errno;
2894 : : /* Post create. */
2895 : 0 : eth_dev->intr_handle = adev->intr_handle;
2896 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2897 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2898 : 0 : eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2899 : 0 : eth_dev->data->numa_node = dev->numa_node;
2900 : : }
2901 : 0 : rte_eth_dev_probing_finish(eth_dev);
2902 : 0 : return 0;
2903 : : }
2904 : :
2905 : : /**
2906 : : * Net class driver callback to probe a device.
2907 : : *
2908 : : * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2909 : : *
2910 : : * @param[in] cdev
2911 : : * Pointer to the common mlx5 device.
2912 : : * @param[in, out] mkvlist
2913 : : * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2914 : : *
2915 : : * @return
2916 : : * 0 on success, a negative errno value otherwise and rte_errno is set.
2917 : : */
2918 : : int
2919 : 0 : mlx5_os_net_probe(struct mlx5_common_device *cdev,
2920 : : struct mlx5_kvargs_ctrl *mkvlist)
2921 : : {
2922 : : int ret;
2923 : :
2924 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2925 : 0 : mlx5_pmd_socket_init();
2926 : 0 : ret = mlx5_init_once();
2927 [ # # ]: 0 : if (ret) {
2928 : 0 : DRV_LOG(ERR, "Unable to init PMD global data: %s",
2929 : : strerror(rte_errno));
2930 : 0 : return -rte_errno;
2931 : : }
2932 : 0 : ret = mlx5_probe_again_args_validate(cdev, mkvlist);
2933 [ # # ]: 0 : if (ret) {
2934 : 0 : DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
2935 : : strerror(rte_errno));
2936 : 0 : return -rte_errno;
2937 : : }
2938 [ # # ]: 0 : if (mlx5_dev_is_pci(cdev->dev))
2939 : 0 : return mlx5_os_pci_probe(cdev, mkvlist);
2940 : : else
2941 : 0 : return mlx5_os_auxiliary_probe(cdev, mkvlist);
2942 : : }
2943 : :
2944 : : /**
2945 : : * Cleanup resources when the last device is closed.
2946 : : */
2947 : : void
2948 : 0 : mlx5_os_net_cleanup(void)
2949 : : {
2950 : 0 : mlx5_pmd_socket_uninit();
2951 : 0 : }
2952 : :
2953 : : /**
2954 : : * Install shared asynchronous device events handler.
2955 : : * This function is implemented to support event sharing
2956 : : * between multiple ports of single IB device.
2957 : : *
2958 : : * @param sh
2959 : : * Pointer to mlx5_dev_ctx_shared object.
2960 : : */
2961 : : void
2962 : 0 : mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2963 : : {
2964 : 0 : struct ibv_context *ctx = sh->cdev->ctx;
2965 : : int nlsk_fd;
2966 : :
2967 : 0 : sh->intr_handle = mlx5_os_interrupt_handler_create
2968 : : (RTE_INTR_INSTANCE_F_SHARED, true,
2969 : : ctx->async_fd, mlx5_dev_interrupt_handler, sh);
2970 [ # # ]: 0 : if (!sh->intr_handle) {
2971 : 0 : DRV_LOG(ERR, "Failed to allocate intr_handle.");
2972 : 0 : return;
2973 : : }
2974 : 0 : nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK);
2975 [ # # ]: 0 : if (nlsk_fd < 0) {
2976 : 0 : DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s",
2977 : : rte_strerror(rte_errno));
2978 : 0 : return;
2979 : : }
2980 : 0 : sh->intr_handle_nl = mlx5_os_interrupt_handler_create
2981 : : (RTE_INTR_INSTANCE_F_SHARED, true,
2982 : : nlsk_fd, mlx5_dev_interrupt_handler_nl, sh);
2983 [ # # ]: 0 : if (sh->intr_handle_nl == NULL) {
2984 : 0 : DRV_LOG(ERR, "Fail to allocate intr_handle");
2985 : 0 : return;
2986 : : }
2987 [ # # ]: 0 : if (sh->cdev->config.devx) {
2988 : : #ifdef HAVE_IBV_DEVX_ASYNC
2989 : : struct mlx5dv_devx_cmd_comp *devx_comp;
2990 : :
2991 : 0 : sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2992 : : devx_comp = sh->devx_comp;
2993 [ # # ]: 0 : if (!devx_comp) {
2994 : 0 : DRV_LOG(INFO, "failed to allocate devx_comp.");
2995 : 0 : return;
2996 : : }
2997 : 0 : sh->intr_handle_devx = mlx5_os_interrupt_handler_create
2998 : : (RTE_INTR_INSTANCE_F_SHARED, true,
2999 : : devx_comp->fd,
3000 : : mlx5_dev_interrupt_handler_devx, sh);
3001 [ # # ]: 0 : if (!sh->intr_handle_devx) {
3002 : 0 : DRV_LOG(ERR, "Failed to allocate intr_handle.");
3003 : 0 : return;
3004 : : }
3005 : : #endif /* HAVE_IBV_DEVX_ASYNC */
3006 : : }
3007 : : }
3008 : :
3009 : : /**
3010 : : * Uninstall shared asynchronous device events handler.
3011 : : * This function is implemented to support event sharing
3012 : : * between multiple ports of single IB device.
3013 : : *
3014 : : * @param dev
3015 : : * Pointer to mlx5_dev_ctx_shared object.
3016 : : */
3017 : : void
3018 : 0 : mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
3019 : : {
3020 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle,
3021 : : mlx5_dev_interrupt_handler, sh);
3022 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl,
3023 : : mlx5_dev_interrupt_handler_nl, sh);
3024 : : #ifdef HAVE_IBV_DEVX_ASYNC
3025 : 0 : mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx,
3026 : : mlx5_dev_interrupt_handler_devx, sh);
3027 [ # # ]: 0 : if (sh->devx_comp)
3028 : 0 : mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
3029 : : #endif
3030 : 0 : }
3031 : :
3032 : : /**
3033 : : * Read statistics by a named counter.
3034 : : *
3035 : : * @param[in] priv
3036 : : * Pointer to the private device data structure.
3037 : : * @param[in] ctr_name
3038 : : * Pointer to the name of the statistic counter to read
3039 : : * @param[out] stat
3040 : : * Pointer to read statistic value.
3041 : : * @return
3042 : : * 0 on success and stat is valud, 1 if failed to read the value
3043 : : * rte_errno is set.
3044 : : *
3045 : : */
3046 : : int
3047 : 0 : mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
3048 : : uint64_t *stat)
3049 : : {
3050 : : int fd;
3051 : :
3052 [ # # ]: 0 : if (priv->sh) {
3053 [ # # ]: 0 : if (priv->q_counters != NULL &&
3054 [ # # ]: 0 : strcmp(ctr_name, "out_of_buffer") == 0) {
3055 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
3056 : 0 : DRV_LOG(WARNING, "DevX out_of_buffer counter is not supported in the secondary process");
3057 : 0 : rte_errno = ENOTSUP;
3058 : 0 : return 1;
3059 : : }
3060 : 0 : return mlx5_devx_cmd_queue_counter_query
3061 : : (priv->q_counters, 0, (uint32_t *)stat);
3062 : : }
3063 [ # # ]: 0 : if (priv->q_counters_hairpin != NULL &&
3064 [ # # ]: 0 : strcmp(ctr_name, "hairpin_out_of_buffer") == 0) {
3065 [ # # ]: 0 : if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
3066 : 0 : DRV_LOG(WARNING, "DevX out_of_buffer counter is not supported in the secondary process");
3067 : 0 : rte_errno = ENOTSUP;
3068 : 0 : return 1;
3069 : : }
3070 : 0 : return mlx5_devx_cmd_queue_counter_query
3071 : : (priv->q_counters_hairpin, 0, (uint32_t *)stat);
3072 : : }
3073 : 0 : MKSTR(path, "%s/ports/%d/hw_counters/%s",
3074 : : priv->sh->ibdev_path,
3075 : : priv->dev_port,
3076 : : ctr_name);
3077 : : fd = open(path, O_RDONLY);
3078 : : /*
3079 : : * in switchdev the file location is not per port
3080 : : * but rather in <ibdev_path>/hw_counters/<file_name>.
3081 : : */
3082 [ # # ]: 0 : if (fd == -1) {
3083 : 0 : MKSTR(path1, "%s/hw_counters/%s",
3084 : : priv->sh->ibdev_path,
3085 : : ctr_name);
3086 : : fd = open(path1, O_RDONLY);
3087 : : }
3088 [ # # ]: 0 : if (fd != -1) {
3089 : 0 : char buf[21] = {'\0'};
3090 : : ssize_t n = read(fd, buf, sizeof(buf));
3091 : :
3092 : 0 : close(fd);
3093 [ # # ]: 0 : if (n != -1) {
3094 : 0 : *stat = strtoull(buf, NULL, 10);
3095 : 0 : return 0;
3096 : : }
3097 : : }
3098 : : }
3099 : 0 : *stat = 0;
3100 : 0 : return 1;
3101 : : }
3102 : :
3103 : : /**
3104 : : * Remove a MAC address from device
3105 : : *
3106 : : * @param dev
3107 : : * Pointer to Ethernet device structure.
3108 : : * @param index
3109 : : * MAC address index.
3110 : : */
3111 : : void
3112 : 0 : mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3113 : : {
3114 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3115 : 0 : const int vf = priv->sh->dev_cap.vf;
3116 : :
3117 [ # # ]: 0 : if (vf)
3118 : 0 : mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3119 : 0 : mlx5_ifindex(dev), priv->mac_own,
3120 : 0 : &dev->data->mac_addrs[index], index);
3121 : 0 : }
3122 : :
3123 : : /**
3124 : : * Adds a MAC address to the device
3125 : : *
3126 : : * @param dev
3127 : : * Pointer to Ethernet device structure.
3128 : : * @param mac_addr
3129 : : * MAC address to register.
3130 : : * @param index
3131 : : * MAC address index.
3132 : : *
3133 : : * @return
3134 : : * 0 on success, a negative errno value otherwise
3135 : : */
3136 : : int
3137 : 0 : mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3138 : : uint32_t index)
3139 : : {
3140 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3141 : 0 : const int vf = priv->sh->dev_cap.vf;
3142 : : int ret = 0;
3143 : :
3144 [ # # ]: 0 : if (vf)
3145 : 0 : ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3146 : 0 : mlx5_ifindex(dev), priv->mac_own,
3147 : : mac, index);
3148 : 0 : return ret;
3149 : : }
3150 : :
3151 : : /**
3152 : : * Modify a VF MAC address
3153 : : *
3154 : : * @param priv
3155 : : * Pointer to device private data.
3156 : : * @param mac_addr
3157 : : * MAC address to modify into.
3158 : : * @param iface_idx
3159 : : * Net device interface index
3160 : : * @param vf_index
3161 : : * VF index
3162 : : *
3163 : : * @return
3164 : : * 0 on success, a negative errno value otherwise
3165 : : */
3166 : : int
3167 : 0 : mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3168 : : unsigned int iface_idx,
3169 : : struct rte_ether_addr *mac_addr,
3170 : : int vf_index)
3171 : : {
3172 : 0 : return mlx5_nl_vf_mac_addr_modify
3173 : : (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3174 : : }
3175 : :
3176 : : /**
3177 : : * Set device promiscuous mode
3178 : : *
3179 : : * @param dev
3180 : : * Pointer to Ethernet device structure.
3181 : : * @param enable
3182 : : * 0 - promiscuous is disabled, otherwise - enabled
3183 : : *
3184 : : * @return
3185 : : * 0 on success, a negative error value otherwise
3186 : : */
3187 : : int
3188 : 0 : mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
3189 : : {
3190 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3191 : :
3192 : 0 : return mlx5_nl_promisc(priv->nl_socket_route,
3193 : : mlx5_ifindex(dev), !!enable);
3194 : : }
3195 : :
3196 : : /**
3197 : : * Set device promiscuous mode
3198 : : *
3199 : : * @param dev
3200 : : * Pointer to Ethernet device structure.
3201 : : * @param enable
3202 : : * 0 - all multicase is disabled, otherwise - enabled
3203 : : *
3204 : : * @return
3205 : : * 0 on success, a negative error value otherwise
3206 : : */
3207 : : int
3208 : 0 : mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
3209 : : {
3210 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3211 : :
3212 : 0 : return mlx5_nl_allmulti(priv->nl_socket_route,
3213 : : mlx5_ifindex(dev), !!enable);
3214 : : }
3215 : :
3216 : : /**
3217 : : * Flush device MAC addresses
3218 : : *
3219 : : * @param dev
3220 : : * Pointer to Ethernet device structure.
3221 : : *
3222 : : */
3223 : : void
3224 : 0 : mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3225 : : {
3226 : 0 : struct mlx5_priv *priv = dev->data->dev_private;
3227 : :
3228 : 0 : mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3229 : : dev->data->mac_addrs,
3230 : 0 : MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3231 : 0 : }
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